Novel charge pump architecture with Fibonacci stage

U ovoj je doktorskoj disertaciji predstavljena nova arhitektura nabojske pumpe. U prvom dijelu rada opisan je osnovni princip rada najčešće korištene nabojske pumpe, Dicksonove nabojske pumpe, te razvijen njen novi matematički model. Novi matematički model je primjenjiv na bilo koju dvo faznu nabojsku pumpu i od postojećih se razlikuje po tome što uzima u obzir utjecaj otpora kanala tranzistora i izvora. Na osnovu predstavljenog matematičkog modela, predložena je nova metoda za određivanje parametara nabojske pumpe, koja također uzima u obzir otpor kanala tranzistora i otpor izvora, te je generalizirana tako da odgovara bilo kojoj dvo faznoj nabojskoj pumpi. Nabojske pumpe visokog dobitka, koje su u posljednje vrijeme postale popularne, također se mogu opisati predstavljenim matematičkim modelom i predloženom metodom određivanja parametara, ako koriste dva protufazna signala takta. Nakon teorijskih i matematičkih analiza, koje uključuju i utjecaj efekta podloge na napon praga tranzistora, predložena je nova arhitektura nabojske pumpe s Fibonaccijevim stupnjem. Proces projektiranja integriranog CMOS sklopa u Cadence okruženju je detaljno opisan i prikazani su rezultati simulacije sa i bez ekstrahiranih paratiznih parametara. Korištenjem Fibonaccijevom stupnja dobiveni su viši izlazni naponi od izlaznih napona klasičnih arhitektura nabojskih pumpi, a CVSL sklop je dokazan kao jednostavno i efikasno rješenje za ispravno upravljanje Fibonaccijevim stupnjem. Nova arhitektura nabojske pumpe je procesirana u sklopu testnog integriranog sklopa korištenjem 0,35 μm AMS-ovog C35B4C3 tehnološkog procesa, zajedno s Dicksonovom, CTS i modificiranom CTS nabojskom pumpom koje služe za usporedbu s novom arhitekturom. Rezultati mjerenja su uspoređeni s rezultatima simulacije, a njihova međusobna odstupanja su detaljno objašnjena. Na temelju usporedbe mjernih i simulacijskih rezultata, dokazano je da SPICE model netočno modelira rad tranzistora u području ispon napona praga te time i ponašanje nabojske pumpe za čisto kapacitivna opterećenja. Također, utvrđeno je formiranje niskopropusnog filtra na priključcima signala takta kod testnog integriranog sklopa, te su predložene metode za rješavanje tog problema.In this doctoral thesis a novel charge pump architecture is presented. In the first part of the thesis the basic principles of operation of the most common charge pump, Dickson charge pump, are described and a novel mathematical model is developed and presented. The presented model is appliable to any two-phase charge pump and it takes into account resistance of MOSFET switches and the power supply resistance as well. Based on the presented mathematical model, a new method for charge pump parameter determination is proposed, which also takes into account the switch and the power supply resistance, and it is generalized to correspond to any two-phase charge pump. Recent high gain charge pump designs, as long as they are two-phase designs, can also be descibed with presented mathematical model and proposed method. After theoretical and mathematical analysis, including body effect on the threshold voltage of the NMOS devices, a novel charge pump architecture with Fibonacci stage is presented. Designing process in Cadence environment is explained in detail and simulation results, both with and without exctracted parasitics, are given. The higher output voltages of the novel architecture, compared with common charge pump architectures, due to used Fibonacci stage are observed and the CVSL circuit is proven to be simple and efficient solution for high amplitude clock generator that is needed to drive the Fibonacci stage. The novel charge pump is proccessed in integrated circuit using 0,35 µm AMS C35B4C3 technology process, together with Dickson, CTS and modified CTS charge pump which are used for comparison with new architecture. Measurements of the fabricated charge pumps are compared with simulation results and the discrepancies are explained. Based on the measurement and simulation comparison, the SPICE model behavior in subthreshold region for a charge pump operating under capacitive load is proved to be faulty. Also, the forming of the low-pass filter on the clock signal pins in processed and bonded integrated circuit is determined, and some solutions are proposed

Antenna and rectifier designs for miniaturized radio frequency energy scavenging systems

With ample radio transmitters scattered throughout urban landscape, RF energy scavenging emerges as a promising approach to extract energy from propagating radio waves in the ambient environment to continuously charge low power electronics. With the ability of generating power from RF energy, the need for batteries could be eliminated. The effective distance of a RF energy scavenging system is highly dependent on its conversion efficiency. This results in significant limitations on the mobility and space requirement of conventional RF energy scavenging systems as they operate only in presence of physically large antennas and conversion circuits to achieve acceptable efficiency. This thesis presents a number of novel design strategies in the antenna and rectifier designs for miniaturized RF energy scavenging system. In the first stage, different energy scavenging systems including solar energy scavenging system, thermoelectric energy scavenging system, wind energy scavenging system, kinetic energy scavenging system, radio frequency energy scavenging system and hybrid energy scavenging system are investigated with regard to their principle and performance. Compared with the other systems, RF energy scavenging system has its advantages on system size and power density with relatively stable energy source. For a typical RF energy scavenging system, antenna and rectifier (AC-DC convertor) are the two essential components to extract RF energy and convert to usable electricity. As the antenna occupies most of the area in the RF energy scavenging system, reduction in antenna size is necessary in order to design a miniaturized system. Several antennas with different characteristics are proposed in the second stage. Firstly, ultra-wideband microstrip antennas printed on a thin substrate with a thickness of 0.2 mm are designed for both half-wave and full-wave wideband RF energy scavenging. Ambient RF power is distributed over a wide range of frequency bands. A wideband RF energy scavenging system can extract power from different frequencies to maximize the input power, hence, generating sufficient output power for charging devices. Wideband operation with 4 GHz bandwidth is obtained by the proposed microstrip antenna. Secondly, multi-band planar inverted-F antennas with low profile are proposed for frequency bands of GSM 900, DCS 1800 and Wi-Fi 2.4 GHz, which are the three most promising frequency bands for RF energy scavenging. Compared with previous designs, the triple band antenna has smaller dimensions with higher antenna gain. Thirdly, a novel miniature inverted-F antenna without empty space covering Wi-Fi 2.4 GHz frequency band is presented dedicated for indoor RF energy scavenging. The antenna has dimensions of only 10 × 5 × 3.5 mm3 with appreciable efficiency across the operating frequency range. In the final stage, a passive CMOS charge pump rectifier in 0.35 μm CMOS technology is proposed for AC to DC conversion. Bootstrapping capacitors are employed to reduce the effective threshold voltage drop of the selected MOS transistors. Transistor sizes are optimized to be 200/0.5 μm. The proposed rectifier achieves improvements in both power conversion efficiency and voltage conversion efficiency compared with conventional designs. The design strategies proposed in this thesis contribute towards the realization of miniaturized RF energy scavenging systems