Response of Commercial P-Channel Power VDMOS Transistors to Ionizing Irradiation and Bias Temperature Stress

n this paper, the e®ects of successively applied static/pulsed negative bias temperature (NBT)stress and irradiation on commercial p-channel power vertical double-di®used metal-oxidesemiconductor (VDMOS) transistors are investigated. To further illustrate the impacts of thesestresses on the power devices, the relative contributions of gate oxide charge (Not) and interfacetraps (Nit) to threshold voltage shifts are shown and studied. It was shown that when irradi-ation without gate voltage is used, the duration of the pre-irradiation static NBT stress has aslightly larger e®ect on the radiation response of power VDMOS transistors. Regarding the factthat the investigated components are more likely to function in the dynamic mode than thestatic mode in practice, additional analysis was focused on the results obtained during thepulsed NBT stress after irradiation. For the components subjected to the pulsed NBT stressafter the irradiation, the e®ects ofNotneutralization andNitpassivation (usually related toannealing) are more enhanced than the components subjected to the static NBT stress, becauseonly a high temperature is applied during the pulse-o® state. It was observed that in devicespreviously irradiated with gate voltage applied, the decrease of threshold voltage shift is sig-ni ̄cantly greater during the pulsed NBT stress than during the static NBT stres