42,734 research outputs found
Boosting Multi-Core Reachability Performance with Shared Hash Tables
This paper focuses on data structures for multi-core reachability, which is a
key component in model checking algorithms and other verification methods. A
cornerstone of an efficient solution is the storage of visited states. In
related work, static partitioning of the state space was combined with
thread-local storage and resulted in reasonable speedups, but left open whether
improvements are possible. In this paper, we present a scaling solution for
shared state storage which is based on a lockless hash table implementation.
The solution is specifically designed for the cache architecture of modern
CPUs. Because model checking algorithms impose loose requirements on the hash
table operations, their design can be streamlined substantially compared to
related work on lockless hash tables. Still, an implementation of the hash
table presented here has dozens of sensitive performance parameters (bucket
size, cache line size, data layout, probing sequence, etc.). We analyzed their
impact and compared the resulting speedups with related tools. Our
implementation outperforms two state-of-the-art multi-core model checkers (SPIN
and DiVinE) by a substantial margin, while placing fewer constraints on the
load balancing and search algorithms.Comment: preliminary repor
Platform Dependent Verification: On Engineering Verification Tools for 21st Century
The paper overviews recent developments in platform-dependent explicit-state
LTL model checking.Comment: In Proceedings PDMC 2011, arXiv:1111.006
A Multi-Core Solver for Parity Games
We describe a parallel algorithm for solving parity games,\ud
with applications in, e.g., modal mu-calculus model\ud
checking with arbitrary alternations, and (branching) bisimulation\ud
checking. The algorithm is based on Jurdzinski's Small Progress\ud
Measures. Actually, this is a class of algorithms, depending on\ud
a selection heuristics.\ud
\ud
Our algorithm operates lock-free, and mostly wait-free (except for\ud
infrequent termination detection), and thus allows maximum\ud
parallelism. Additionally, we conserve memory by avoiding storage\ud
of predecessor edges for the parity graph through strictly\ud
forward-looking heuristics.\ud
\ud
We evaluate our multi-core implementation's behaviour on parity games\ud
obtained from mu-calculus model checking problems for a set of\ud
communication protocols, randomly generated problem instances, and\ud
parametric problem instances from the literature.\ud
\u
Parallel Recursive State Compression for Free
This paper focuses on reducing memory usage in enumerative model checking,
while maintaining the multi-core scalability obtained in earlier work. We
present a tree-based multi-core compression method, which works by leveraging
sharing among sub-vectors of state vectors.
An algorithmic analysis of both worst-case and optimal compression ratios
shows the potential to compress even large states to a small constant on
average (8 bytes). Our experiments demonstrate that this holds up in practice:
the median compression ratio of 279 measured experiments is within 17% of the
optimum for tree compression, and five times better than the median compression
ratio of SPIN's COLLAPSE compression.
Our algorithms are implemented in the LTSmin tool, and our experiments show
that for model checking, multi-core tree compression pays its own way: it comes
virtually without overhead compared to the fastest hash table-based methods.Comment: 19 page
Parallel symbolic state-space exploration is difficult, but what is the alternative?
State-space exploration is an essential step in many modeling and analysis
problems. Its goal is to find the states reachable from the initial state of a
discrete-state model described. The state space can used to answer important
questions, e.g., "Is there a dead state?" and "Can N become negative?", or as a
starting point for sophisticated investigations expressed in temporal logic.
Unfortunately, the state space is often so large that ordinary explicit data
structures and sequential algorithms cannot cope, prompting the exploration of
(1) parallel approaches using multiple processors, from simple workstation
networks to shared-memory supercomputers, to satisfy large memory and runtime
requirements and (2) symbolic approaches using decision diagrams to encode the
large structured sets and relations manipulated during state-space generation.
Both approaches have merits and limitations. Parallel explicit state-space
generation is challenging, but almost linear speedup can be achieved; however,
the analysis is ultimately limited by the memory and processors available.
Symbolic methods are a heuristic that can efficiently encode many, but not all,
functions over a structured and exponentially large domain; here the pitfalls
are subtler: their performance varies widely depending on the class of decision
diagram chosen, the state variable order, and obscure algorithmic parameters.
As symbolic approaches are often much more efficient than explicit ones for
many practical models, we argue for the need to parallelize symbolic
state-space generation algorithms, so that we can realize the advantage of both
approaches. This is a challenging endeavor, as the most efficient symbolic
algorithm, Saturation, is inherently sequential. We conclude by discussing
challenges, efforts, and promising directions toward this goal
DiVinE-CUDA - A Tool for GPU Accelerated LTL Model Checking
In this paper we present a tool that performs CUDA accelerated LTL Model
Checking. The tool exploits parallel algorithm MAP adjusted to the NVIDIA CUDA
architecture in order to efficiently detect the presence of accepting cycles in
a directed graph. Accepting cycle detection is the core algorithmic procedure
in automata-based LTL Model Checking. We demonstrate that the tool outperforms
non-accelerated version of the algorithm and we discuss where the limits of the
tool are and what we intend to do in the future to avoid them
Verifying Real-Time Systems using Explicit-time Description Methods
Timed model checking has been extensively researched in recent years. Many
new formalisms with time extensions and tools based on them have been
presented. On the other hand, Explicit-Time Description Methods aim to verify
real-time systems with general untimed model checkers. Lamport presented an
explicit-time description method using a clock-ticking process (Tick) to
simulate the passage of time together with a group of global variables for time
requirements. This paper proposes a new explicit-time description method with
no reliance on global variables. Instead, it uses rendezvous synchronization
steps between the Tick process and each system process to simulate time. This
new method achieves better modularity and facilitates usage of more complex
timing constraints. The two explicit-time description methods are implemented
in DIVINE, a well-known distributed-memory model checker. Preliminary
experiment results show that our new method, with better modularity, is
comparable to Lamport's method with respect to time and memory efficiency
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