Interconnection and damping assignment passivity-based controller for multilevel inverter

This thesis proposes an Interconnection and Damping Assignment Passivity- Based Controller (IDA-PBC) to control a 5-level Cascaded H-Bridge Multilevel Inverter (CHMI). The proposed IDA-PBC uses the Port-Controlled Hamiltonian (PCH) theory to modify the CHMI system energy by adding damping, thereby modifying dissipation structures related to dynamics and stability. The objective is to maintain output voltage regulation, resulting in fast response and low Total Harmonic Distortion (THD) values. Although the proposed IDA-PBC control algorithm showed outstanding performance during transient and nonlinear load condition, further improvements are required during no-load condition. To address this, improvements in the form of modification to the proposed IDA-PBC algorithm was made by adding a single loop Proportional-Integral (PI) controller at the voltage side, which was aimed at regulating the voltage before it was fed back into the IDAPBC. In order to verify the viability of the proposed IDA-PBC-PI controller for the CHMI, a simulation study was conducted using MATLAB/Simulink at a 20 kHz switching frequency and 1 µs sample time. The controller was tested at five load conditions, namely, steady state, no-load to full-load, load uncertainty, structural uncertainty and nonlinear load condition. The performance of the proposed controller showed regulated output voltage while maintaining THD values below 5% in all load conditions and a maximum of 220 µs response time during load uncertainty. The simulation results revealed the superiority of the proposed controller compared to the conventional double loop PI controller and the conventional IDA-PBC in terms of transient response, THD value, as well as regulation of the output voltage. The feasibility of the proposed IDA-PBC-PI controller was validated by developing its proof-of-concept hardware prototype. The simulation and experimental results obtained based on a 3 kHz switching frequency and 38 µs sample time were found to be consistent, which confirmed the capability of the proposed controller in controlling the 5-level CHMI output voltage

Modular Multilevel Converter (MMC) with High-Frequency Link and Natural Capacitor Balancing for Grid-Interfacing of Renewables

University of Minnesota Ph.D. dissertation. March 2021. Major: Electrical Engineering. Advisor: Ned Mohan. 1 computer file (PDF); xv, 67 pages.This thesis presents an isolated modular multi-level architecture designed to interface low/medium DC voltage sources (such as renewable energy sources) to medium-voltage transmission/distribution system levels. The architecture usesisolated high-frequency links with full-bridge sub-modules. Due to its structure, it has natural capacitor self-balancing properties and all the three phases can be operated independently on a single phase basis. The proposed topology consists of one primary H-Bridge converter and several identical sub-modules. Each sub-module consists of a high-frequency transformer, a full-bridge diode rectifier, a capacitor, and a full-bridge output-stage converter. The output of the primary H-Bridge is connected to a high-frequency bus. All submodules draw power from this bus. Sub-module outputs are connected in series on a per-phase basis, to generate large multi-level voltage outputs. Since each module produces an isolated, bipolar, switching AC voltage, modules are inserted or bypassed to synthesize the desired AC voltages level. This thesis presents a novel hybrid pulse-width-modulation (PWM) method for this topology which combines the benefits of level-shifted PWM (low switching losses) with the benefits of phase-shifted PWM (equal module utilization). This is achieved through a re-assignment of carriers, resulting in negligible computational overhead. The thesis also includes a new variant of this topology with a combination of wide-bandgap (WBG) and silicon (Si) devices; along with the associatedPWMscheme. Here, one sub-module (SM) in each phase employs Gallium Nitride (GaN) devices and switches at high frequency to produce a switching output voltage, while the rest of the sub-modules consist of traditional Si devices operating at low switching frequency. This combination reduces the overall converter cost while also yielding high efficiency. The proposed schemes are validated by simulation and experimental results with a nine-level H-Bridge multi-level converter hardware