Performance modeling of fault-tolerant circuit-switched communication networks

Circuit switching (CS) has been suggested as an efficient switching method for supporting simultaneous communications (such as data, voice, and images) across parallel systems due to its ability to preserve both communication performance and fault-tolerant demands in such systems. In this paper we present an efficient scheme to capture the mean message latency in 2D torus with CS in the presence of faulty components. We have also conducted extensive simulation experiments, the results of which are used to validate the analytical mode

Cycle-accurate evaluation of reconfigurable photonic networks-on-chip

There is little doubt that the most important limiting factors of the performance of next-generation Chip Multiprocessors (CMPs) will be the power efficiency and the available communication speed between cores. Photonic Networks-on-Chip (NoCs) have been suggested as a viable route to relieve the off- and on-chip interconnection bottleneck. Low-loss integrated optical waveguides can transport very high-speed data signals over longer distances as compared to on-chip electrical signaling. In addition, with the development of silicon microrings, photonic switches can be integrated to route signals in a data-transparent way. Although several photonic NoC proposals exist, their use is often limited to the communication of large data messages due to a relatively long set-up time of the photonic channels. In this work, we evaluate a reconfigurable photonic NoC in which the topology is adapted automatically (on a microsecond scale) to the evolving traffic situation by use of silicon microrings. To evaluate this system's performance, the proposed architecture has been implemented in a detailed full-system cycle-accurate simulator which is capable of generating realistic workloads and traffic patterns. In addition, a model was developed to estimate the power consumption of the full interconnection network which was compared with other photonic and electrical NoC solutions. We find that our proposed network architecture significantly lowers the average memory access latency (35% reduction) while only generating a modest increase in power consumption (20%), compared to a conventional concentrated mesh electrical signaling approach. When comparing our solution to high-speed circuit-switched photonic NoCs, long photonic channel set-up times can be tolerated which makes our approach directly applicable to current shared-memory CMPs

Towards transnational interoperable PPDR communications: the European ISI cloud network

The European Council has been stressing the need for interoperability among technologies used for Public Protection and Disaster Relief (PPDR) communications across Europe for a long time. Nevertheless, while the introduction of TETRA and TETRAPOL technologies in the last two decades has increased the possibility to talk cross agency internally in a country, cross border communication for the public safety forces is not well solved as of today. This paper describes the communications interoperability solution that is being developed in the framework of the ISITEP project. This solution, referred to as the European Inter-System Interface (ISI) Cloud Network, aims to integrate the PPDR national/regional infrastructures to allow migration (i.e., roaming) and communication services between networks within a secure framework. The ISI Cloud Network involves, among other components, the specification of a new ISI interface to be deployed over IP transport networks and the development of a number of different gateways to cover the use of TETRA and TETRAPOL technologies as well as the use of legacy TETRA ISI by some networks.Peer ReviewedPostprint (author's final draft

Is America Exporting Misguided Telecommunications Policy? The U.S.-Japan Telecom Trade Negotiations and Beyond

Global telecommunications markets have traditionally been closed to foreign trade and investment. Recent World Trade Organization negotiations resulted in a Basic Telecommunications agreement that sought to construct a multilateral framework to reverse that trend and begin opening telecom markets worldwide. Regrettably, this new WTO framework is quite ambiguous and open to pro-regulatory interpretations by member states. In fact, during recent bilateral trade negotiations with Japan, U.S. government officials adopted the position that the new framework allowed them to demand that the Japanese government adopt very specific regulatory provisions regarding telecom network interconnection and pricing policies. The Office of the U.S. Trade Representative argued that Japanese officials should require their domestic telecom providers to share their networks with rivals at a generously discounted price to encourage greater resale competition. Those interconnection and line-sharing rules were borrowed directly from the U.S. Telecommunications Act of 1996, a piece of legislation that remains the subject of intense debate within the United States. Good evidence now exists that those rules generally retard net-work investment and innovation by encouraging infrastructure sharing over facilities-based investment. Consequently, the USTR has generated resentment on the part of Japan and other trading partners as it has attempted to force them to adopt heavy-handed telecommunications mandates that have very little to do with legitimate free-trade policy. The USTR must discontinue efforts to impose American telecommunications regulations on other countries as part of free-trade negotiations and should instead focus on reforming or eliminating the most serious barriers to foreign direct investment both here and abroad

A network flow model for load balancing in circuit-switched multicomputers

In multicomputers that utilize circuit switching or wormhole routing, communication overhead depends largely on link contention - the variation due to distance between nodes is negligible. This has a major impact on the load balancing problem. In this case, there are some nodes with excess load (sources) and others with deficit load (sinks) and it is required to find a matching of sources to sinks that avoids contention. The problem is made complex by the hardwired routing on currently available machines: the user can control only which nodes communicate but not how the messages are routed. Network flow models of message flow in the mesh and the hypercube were developed to solve this problem. The crucial property of these models is the correspondence between minimum cost flows and correctly routed messages. To solve a given load balancing problem, a minimum cost flow algorithm is applied to the network. This permits one to determine efficiently a maximum contention free matching of sources to sinks which, in turn, tells one how much of the given imbalance can be eliminated without contention

An Energy and Performance Exploration of Network-on-Chip Architectures

In this paper, we explore the designs of a circuit-switched router, a wormhole router, a quality-of-service (QoS) supporting virtual channel router and a speculative virtual channel router and accurately evaluate the energy-performance tradeoffs they offer. Power results from the designs placed and routed in a 90-nm CMOS process show that all the architectures dissipate significant idle state power. The additional energy required to route a packet through the router is then shown to be dominated by the data path. This leads to the key result that, if this trend continues, the use of more elaborate control can be justified and will not be immediately limited by the energy budget. A performance analysis also shows that dynamic resource allocation leads to the lowest network latencies, while static allocation may be used to meet QoS goals. Combining the power and performance figures then allows an energy-latency product to be calculated to judge the efficiency of each of the networks. The speculative virtual channel router was shown to have a very similar efficiency to the wormhole router, while providing a better performance, supporting its use for general purpose designs. Finally, area metrics are also presented to allow a comparison of implementation costs

Economic Development Potential through IP Telephony for Namibia

IP telephony, economic growth, telecommunications, ICT, Granger causality, Namibia

Energy Model of Networks-on-Chip and a Bus

A Network-on-Chip (NoC) is an energy-efficient onchip communication architecture for Multi-Processor Systemon-Chip (MPSoC) architectures. In earlier papers we proposed two Network-on-Chip architectures based on packet-switching and circuit-switching. In this paper we derive an energy model for both NoC architectures to predict their energy consumption per transported bit. Both architectures are also compared with a traditional bus architecture. The energy model is primarily needed to find a near optimal run-time mapping (from an energy point of view) of inter-process communication to NoC link

Exporting Telecommunications Regulation: The U.S.-Japan Negotiations on Interconnection Pricing

Since 1997, the U.S. government has attempted to use the World Trade Organization (WTO) agreement on telecommunications services as a vehicle for 'exporting' American principles of telecommunications regulation to other nations. The United States took the position in 1997 that the WTO telecommunications agreement requires its signatory nations to follow the practices of the Federal Communications Commission (FCC) on telecommunications regulatory policy. Subsequently, the Office of the U.S. Trade Representative (USTR) has sought to influence, under the implicit threat of trade sanctions, Japan's domestic regulatory policy on the pricing of mandatory competitor access to the unbundled elements of the local network belonging to the operating companies of Nippon Telegraph and Telephone Corporation (NTT). In this Article, we examine the substantive difficulties of engrafting the FCC's interconnection policy onto the telecommunications marketplace of another nation. For more than five years, many American experts on telecommunications policy have disagreed whether American consumers have benefited from the very FCC policies that the USTR would have Japanese regulators emulate. The USTR's initiative appears to ignore that the transition to costoriented rates for interconnection and retail telecommunications services has been a difficult and unfinished process in the United States; that the cost models used by the FCC to set interconnection prices have significant deficiencies; that actual interconnection prices both within and outside the United States diverge considerably from the estimates of the FCC's cost models; that variations across countries in the prices of inputs have a significant effect on the costs of interconnection; and that, with respect to depreciation in particular, regulators treat this cost differently'and, from an economic perspective, more reasonably'in Japan than in the United States. Such substantive economic considerations suggest why the FCC's policy in this area has generated continuous litigation, including two Supreme Court cases, since 1996 and consequently is too unresolved at this point in the American experience for the United States to force on its trading partners. Next, we ask whether the USTR has the detailed knowledge required to negotiate trade agreements on interconnection pricing. We question the propriety of using the USTR to influence the domestic regulatory policy of another country on a topic as complex as the efficient pricing of mandatory access to unbundled network elements. The USTR's power to formulate trade policy on this subject resides in officials who are unlikely to possess the economic expertise and resources necessary to evaluate the consumer-welfare implications of the policies that they would have Japan and other nations adopt. For these reasons, the USTR cannot credibly make the interconnection pricing policies of another nation a legitimate concern of U.S. trade policy.