A Comprehensive Workflow for General-Purpose Neural Modeling with Highly Configurable Neuromorphic Hardware Systems

In this paper we present a methodological framework that meets novel requirements emerging from upcoming types of accelerated and highly configurable neuromorphic hardware systems. We describe in detail a device with 45 million programmable and dynamic synapses that is currently under development, and we sketch the conceptual challenges that arise from taking this platform into operation. More specifically, we aim at the establishment of this neuromorphic system as a flexible and neuroscientifically valuable modeling tool that can be used by non-hardware-experts. We consider various functional aspects to be crucial for this purpose, and we introduce a consistent workflow with detailed descriptions of all involved modules that implement the suggested steps: The integration of the hardware interface into the simulator-independent model description language PyNN; a fully automated translation between the PyNN domain and appropriate hardware configurations; an executable specification of the future neuromorphic system that can be seamlessly integrated into this biology-to-hardware mapping process as a test bench for all software layers and possible hardware design modifications; an evaluation scheme that deploys models from a dedicated benchmark library, compares the results generated by virtual or prototype hardware devices with reference software simulations and analyzes the differences. The integration of these components into one hardware-software workflow provides an ecosystem for ongoing preparative studies that support the hardware design process and represents the basis for the maturity of the model-to-hardware mapping software. The functionality and flexibility of the latter is proven with a variety of experimental results

Voltage Stabilization in Microgrids via Quadratic Droop Control

We consider the problem of voltage stability and reactive power balancing in islanded small-scale electrical networks outfitted with DC/AC inverters ("microgrids"). A droop-like voltage feedback controller is proposed which is quadratic in the local voltage magnitude, allowing for the application of circuit-theoretic analysis techniques to the closed-loop system. The operating points of the closed-loop microgrid are in exact correspondence with the solutions of a reduced power flow equation, and we provide explicit solutions and small-signal stability analyses under several static and dynamic load models. Controller optimality is characterized as follows: we show a one-to-one correspondence between the high-voltage equilibrium of the microgrid under quadratic droop control, and the solution of an optimization problem which minimizes a trade-off between reactive power dissipation and voltage deviations. Power sharing performance of the controller is characterized as a function of the controller gains, network topology, and parameters. Perhaps surprisingly, proportional sharing of the total load between inverters is achieved in the low-gain limit, independent of the circuit topology or reactances. All results hold for arbitrary grid topologies, with arbitrary numbers of inverters and loads. Numerical results confirm the robustness of the controller to unmodeled dynamics.Comment: 14 pages, 8 figure

DPA on quasi delay insensitive asynchronous circuits: formalization and improvement

The purpose of this paper is to formally specify a flow devoted to the design of Differential Power Analysis (DPA) resistant QDI asynchronous circuits. The paper first proposes a formal modeling of the electrical signature of QDI asynchronous circuits. The DPA is then applied to the formal model in order to identify the source of leakage of this type of circuits. Finally, a complete design flow is specified to minimize the information leakage. The relevancy and efficiency of the approach is demonstrated using the design of an AES crypto-processor.Comment: Submitted on behalf of EDAA (http://www.edaa.com/