3,965 research outputs found

    Millimeter-wave propagation within a computer chip package

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    © 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.Wireless Network-on-Chip (WNoC) appears as a promising alternative to conventional interconnect fabrics for chip-scale communications. The WNoC paradigm has been extensively analyzed from the physical, network and architecture perspectives assuming mmWave band operation. However, there has not been a comprehensive study at this band for realistic chip packages and, thus, the characteristics of such wireless channel remain not fully understood. This work addresses this issue by accurately modeling a flip-chip package and investigating the wave propagation inside it. Through parametric studies, a locally optimal configuration for 60 GHz WNoC is obtained, showing that chip-wide attenuation below 32.6 dB could be achieved with standard processes. Finally, the applicability of the methodology is discussed for higher bands and other integrated environments such as a Software-Defined Metamaterial (SDM).Peer ReviewedPostprint (author's final draft

    Channel Characterization for Chip-scale Wireless Communications within Computing Packages

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    Wireless Network-on-Chip (WNoC) appears as a promising alternative to conventional interconnect fabrics for chip-scale communications. WNoC takes advantage of an overlaid network composed by a set of millimeter-wave antennas to reduce latency and increase throughput in the communication between cores. Similarly, wireless inter-chip communication has been also proposed to improve the information transfer between processors, memory, and accelerators in multi-chip settings. However, the wireless channel remains largely unknown in both scenarios, especially in the presence of realistic chip packages. This work addresses the issue by accurately modeling flip-chip packages and investigating the propagation both its interior and its surroundings. Through parametric studies, package configurations that minimize path loss are obtained and the trade-offs observed when applying such optimizations are discussed. Single-chip and multi-chip architectures are compared in terms of the path loss exponent, confirming that the amount of bulk silicon found in the pathway between transmitter and receiver is the main determinant of losses.Comment: To be presented 12th IEEE/ACM International Symposium on Networks-on-Chip (NOCS 2018); Torino, Italy; October 201

    Millimetre Wave Power Measurement

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    There is currently no traceable power sensor for millimetre wave frequencies above 110 GHz. This thesis investigates a novel approach to remove this limitation by combining the placement of a uniquely designed microchip directly in waveguide. The design of the chip is novel in that it does not rely on a supporting structure or an external antenna when placed in the waveguide. The performance of the design was primarily analysed by computer simulation and verified with the measurement of a scale model. The results show that it is feasible to measure high frequency power by placing a chip directly in waveguide. It is predicted that the chip is able to absorb approximately 60% of incident power. Any further efficiency would require modification of the chip substrate. However, this proposed design should allow the standards institutes a reference that will enable the calibration of equipment to beyond 110 GHz

    Millimeter-Wave Lumped Element Superconducting Bandpass Filters for Multi-Color Imaging

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    The opacity due to water vapor in the Earth's atmosphere obscures portions of the sub-THz spectrum (mm/sub-mm wavelengths) to ground based astronomical observation. For maximum sensitivity, instruments operating at these wavelengths must be designed to have spectral responses that match the available windows in the atmospheric transmission that occur in between the strong water absorption lines. Traditionally, the spectral response of mm/sub-mm instruments has been set using optical, metal-mesh bandpass filters [1]. An alternative method for defining the passbands, available when using superconducting detectors coupled with planar antennas, is to use on-chip, superconducting filters [2]. This paper presents the design and testing of superconducting, lumped element, on-chip bandpass filters (BPFs), placed inline with the microstrip connecting the antenna and the detector, covering the frequency range from 209–416 GHz. Four filters were designed with pass bands 209–274 GHz, 265–315 GHz, 335–361 GHz and 397–416 GHz corresponding to the atmospheric transmission windows. Fourier transform spectroscopy was used to verify that the spectral response of the BPFs is well predicted by the computer simulations. Two-color operation of the pixels was demonstrated by connecting two detectors to a single broadband antenna through two BPFs. Scalability of the design to multiple (four) colors is discussed

    Channel characterization for chip-scale wireless communications within computing packages

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    Wireless Network-on-Chip (WNoC) appears as a promising alternative to conventional interconnect fabrics for chip-scale communications. WNoC takes advantage of an overlaid network composed by a set of millimeter-wave antennas to reduce latency and increase throughput in the communication between cores. Similarly, wireless inter-chip communication has been also proposed to improve the information transfer between processors, memory, and accelerators in multi-chip settings. However, the wireless channel remains largely unknown in both scenarios, especially in the presence of realistic chip packages. This work addresses the issue by accurately modeling flip-chip packages and investigating the propagation both its interior and its surroundings. Through parametric studies, package configurations that minimize path loss are obtained and the trade-offs observed when applying such optimizations are discussed. Single-chip and multi-chip architectures are compared in terms of the path loss exponent, confirming that the amount of bulk silicon found in the pathway between transmitter and receiver is the main determinant of losses.Peer ReviewedPostprint (author's final draft

    Planar antenna design and channel modeling for chip-scale communications

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    The need to handle the communication demands of growing multicore processors have created a framework where Wireless Network-on-Chip (WNoC) appears as a promising complement to wired chip interconnects. In this thesis, a planar antenna design is proposed to characterize the yet largely unknown wireless channel within realistic chip packages. This work addresses the issue by modeling a flip-chip package and designing an antenna at 250 GHz, seeking it to be readily integrable in the package and the enabler of a low-loss (although probably highly reverberating) wireless channel across the package.Through simulation-based parametric studies of antenna and package configurations, and placing multiple antennas in the package, path losses and delay spread measurements are obtained to characterize the deterministic channel within a chip. We demonstrate that a wireless link around 220--230 GHz in a reverberant cavity on top of the chip package can be created with patch antennas, achieving a path loss in the range of 2--10 dB and delay spreads in the sub-nanosecond range, although time-domain results are limited in our case to computational constraints of the simulations.La necesidad de gestionar las demandas de comunicación de los crecientes procesadores multinúcleo ha creado un marco en el que las redes inalámbricas en chip (Wireless Network-on-Chip, WNoC) aparecen como un prometedor complemento a las interconexiones de chip por cable. En esta tesis se propone un diseño de antena planar para caracterizar el canal inalámbrico, aún muy desconocido, dentro de paquetes de chips realistas. Este trabajo aborda la cuestión mediante el modelado de un paquete flip-chip y el diseño de una antena a 250 GHz, buscando que sea fácilmente integrable en el paquete y el habilitador de un canal inalámbrico de baja pérdida (aunque probablemente altamente reverberante) a través del paquete.A través de estudios paramétricos basados en simulaciones de configuraciones de antena y paquete, y colocando múltiples antenas en el paquete, se obtienen pérdidas de trayectoria y mediciones de propagación de retardo para caracterizar el canal determinista dentro de un chip. Demostramos que es posible crear un enlace inalámbrico en torno a 220-230 GHz en una cavidad reverberante en la parte superior del encapsulado del chip con antenas de parche, consiguiendo path losses del orden de 2-10 dB y un delay spread en el rango de los sub-nanosegundos, aunque los resultados en el dominio del tiempo están limitados en nuestro caso por las restricciones computacionales de las simulaciones.La necessitat de gestionar les demandes de comunicació dels creixents processadors multinucli ha creat un marc en què les xarxes sense fils en xip (Wireless Network-on-Chip, WNoC) apareixen com un prometedor complement a les interconnexions de xip per cable. En aquesta tesi es proposa un disseny d'antena planar per caracteritzar el canal sense fil, encara molt desconegut, dins de paquets de xips realistes. Aquest treball aborda la qüestió mitjançant el modelatge d'un paquet flip-chip i el disseny d'una antena a 250 GHz, buscant que sigui fàcilment integrable al paquet i l'habilitador d'un canal sense fil de baixa pèrdua (encara que probablement altament reverberant) del paquet. A través d'estudis paramètrics basats en simulacions de configuracions d'antena i paquet, i col·locant múltiples antenes al paquet, s'obtenen pèrdues de trajectòria i mesuraments de propagació de retard per caracteritzar el canal determinista dins d'un xip. Demostrem que és possible crear un enllaç sense fils al voltant de 220-230 GHz en una cavitat reverberant a la part superior de l'encapsulat del xip amb antenes de pegat, aconseguint path losses de l'ordre de 2-10 dB i un delay spread en el rang dels subnanosegons, encara que els resultats en el domini del temps estan limitats en el nostre cas per les restriccions computacionals de les simulacions

    Exploration of intercell wireless millimeter-wave communication in the landscape of intelligent metasurfaces

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    Software-defined metasurfaces are electromagnetically ultra-thin, artificial components thatcan provide engineered and externally controllable functionalities. The control over these functionalities isenabled by the metasurface tunability, which is implemented by embedded electronic circuits that modifylocally the surface resistance and reactance. Integrating controllers within the metasurface able them tointercommunicate and adaptively reconfigure, thus imparting a desired electromagnetic operation, opens thepath towards the creation of an artificially intelligent (AI) fabric where each unit cell can have its own sensing,programmable computing, and actuation facilities. In this work we take a crucial step towards bringing theAI metasurface technology to emerging applications, in particular exploring the wireless mm-wave intercellcommunication capabilities in a software-defined HyperSurface designed for operation in the microwaveregime. We examine three different wireless communication channels within the landscape of the reflectivemetasurface: Firstly, in the layer where the control electronics of the HyperSurface lie, secondly inside adedicated layer enclosed between two metallic plates, and, thirdly, inside the metasurface itself. For each casewe examine the physical implementation of the mm-wave transceiver nodes, we quantify communicationchannel metrics, and we identify complexity vs. performance trade-offs.Peer ReviewedPostprint (published version

    Engineer the channel and adapt to it: enabling wireless intra-chip communication

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    © 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.The authors gratefully acknowledge support from the Spanish MINECO under grant PCIN-2015-012, from the EU’s H2020 FET-OPEN program under grants No. 736876 and No. 863337, and by the Catalan Institution for Research and Advanced Studies (ICREA).Peer ReviewedPostprint (author's final draft
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