A 2.0 Gb/s Throughput Decoder for QC-LDPC Convolutional Codes

This paper propose a decoder architecture for low-density parity-check convolutional code (LDPCCC). Specifically, the LDPCCC is derived from a quasi-cyclic (QC) LDPC block code. By making use of the quasi-cyclic structure, the proposed LDPCCC decoder adopts a dynamic message storage in the memory and uses a simple address controller. The decoder efficiently combines the memories in the pipelining processors into a large memory block so as to take advantage of the data-width of the embedded memory in a modern field-programmable gate array (FPGA). A rate-5/6 QC-LDPCCC has been implemented on an Altera Stratix FPGA. It achieves up to 2.0 Gb/s throughput with a clock frequency of 100 MHz. Moreover, the decoder displays an excellent error performance of lower than $10^{-13}$ at a bit-energy-to-noise-power-spectral-density ratio ($E_b/N_0$) of 3.55 dB.Comment: accepted to IEEE Transactions on Circuits and Systems

Efficient Search of Compact QC-LDPC and SC-LDPC Convolutional Codes with Large Girth

We propose a low-complexity method to find quasi-cyclic low-density parity-check block codes with girth 10 or 12 and shorter length than those designed through classical approaches. The method is extended to time-invariant spatially coupled low-density parity-check convolutional codes, permitting to achieve small syndrome former constraint lengths. Several numerical examples are given to show its effectiveness.Comment: 4 pages, 3 figures, 1 table, accepted for publication in IEEE Communications Letter

Information-Coupled Turbo Codes for LTE Systems

We propose a new class of information-coupled (IC) Turbo codes to improve the transport block (TB) error rate performance for long-term evolution (LTE) systems, while keeping the hybrid automatic repeat request protocol and the Turbo decoder for each code block (CB) unchanged. In the proposed codes, every two consecutive CBs in a TB are coupled together by sharing a few common information bits. We propose a feed-forward and feed-back decoding scheme and a windowed (WD) decoding scheme for decoding the whole TB by exploiting the coupled information between CBs. Both decoding schemes achieve a considerable signal-to-noise-ratio (SNR) gain compared to the LTE Turbo codes. We construct the extrinsic information transfer (EXIT) functions for the LTE Turbo codes and our proposed IC Turbo codes from the EXIT functions of underlying convolutional codes. An SNR gain upper bound of our proposed codes over the LTE Turbo codes is derived and calculated by the constructed EXIT charts. Numerical results show that the proposed codes achieve an SNR gain of 0.25 dB to 0.72 dB for various code parameters at a TB error rate level of $10^{-2}$, which complies with the derived SNR gain upper bound.Comment: 13 pages, 12 figure

A mathematical tool for constructing parametrizable spatially-coupled LDPC codes with cyclic structure and large girth

Spatially-coupled low-density parity-check codes (SC-LDPC) have been shown to be superior in performance than LDPC block codes for both communication and storage systems. Several heuristic construction methods for these codes have been proposed in the literature, but they allow the construction of SC-LDPC codes for only specific nodedegrees, short code length and lead to encoders/decoders with non-parametrizable complex architectures. In this work we construct a mathematical tool for generating SC-LDPC codes with arbitrary node-degrees, girth of at least six and a parity-matrix with cyclic structure. The generated codes satisfy some minimum communication performance requirements which can be previously determined and can they can also be encoded/decoded with reduced-complexity parametrizable hardware architectures. An encoder architecture with reduced memory size and reduced-complexity, known as partial-syndrome based encoder, was implemented in software and the code encodability was verified. The partial-syndrome encoder structure proposed in the literature has constrained code rate and a modified SC-LDPC code was implemented, allowing the generated codes to be encoded with the partial-syndrome encoder architecture for arbitrary rates. A reduced-complexity decoder known as window decoder was implemented in software and the code decodability was also verified.Códigos Spatially-coupled low-density parity-check (SC-LDPC) têm apresentado melhor performance do que LDPC block codes, tanto em sistemas de comunicação quanto de armazenamento. Diversos métodos heurísticos de construção para estes códigos têm sido propostos na literatura, os quais possibilitam a obtenção de códigos SC-LDPC com específicos node-degrees, pequenos comprimentos de código e necessitam codificadores/decodificadores de arquitetura complexa não-parametrizável. Neste trabalho, construiu-se uma ferramenta matemática para a geração de códigos SC-LDPC com node-degrees arbitrários, girth de no mínimo seis e matriz de paridade com estrutura cíclica. Os códigos gerados satisfazem requisitos mínimos de performance de comunicação que podem ser previamente estabelecidos e podem ser codificados/decodificados por arquiteturas de hardware parametrizáveis de complexidade reduzida. Implementou-se em software um codificador de arquitetura parametrizável com tamanho de memória reduzido e baixa complexidade, conhecido como codificador baseado em partial syndrome, e verificou-se a codificação dos códigos construídos. As arquiteturas para codificadores do tipo partial-syndrome encontradas na literatura possuem taxas de codificação não arbitrárias e por isso, modificou-se os códigos SC-LDPC construídos, permitindo que os códigos gerados possam ser codificados com o mesmo codificador do tipo partial-syndrome para taxas de codificação arbitrárias. Implementou-se em software um decodificador de complexidade reduzida, conhecido como window decoder, e verificou-se a convergência dos códigos SC-LDPC construídos

The Road From Classical to Quantum Codes: A Hashing Bound Approaching Design Procedure

Powerful Quantum Error Correction Codes (QECCs) are required for stabilizing and protecting fragile qubits against the undesirable effects of quantum decoherence. Similar to classical codes, hashing bound approaching QECCs may be designed by exploiting a concatenated code structure, which invokes iterative decoding. Therefore, in this paper we provide an extensive step-by-step tutorial for designing EXtrinsic Information Transfer (EXIT) chart aided concatenated quantum codes based on the underlying quantum-to-classical isomorphism. These design lessons are then exemplified in the context of our proposed Quantum Irregular Convolutional Code (QIRCC), which constitutes the outer component of a concatenated quantum code. The proposed QIRCC can be dynamically adapted to match any given inner code using EXIT charts, hence achieving a performance close to the hashing bound. It is demonstrated that our QIRCC-based optimized design is capable of operating within 0.4 dB of the noise limit

Design and Analysis of Time-Invariant SC-LDPC Convolutional Codes With Small Constraint Length

In this paper, we deal with time-invariant spatially coupled low-density parity-check convolutional codes (SC-LDPC-CCs). Classic design approaches usually start from quasi-cyclic low-density parity-check (QC-LDPC) block codes and exploit suitable unwrapping procedures to obtain SC-LDPC-CCs. We show that the direct design of the SC-LDPC-CCs syndrome former matrix or, equivalently, the symbolic parity-check matrix, leads to codes with smaller syndrome former constraint lengths with respect to the best solutions available in the literature. We provide theoretical lower bounds on the syndrome former constraint length for the most relevant families of SC-LDPC-CCs, under constraints on the minimum length of cycles in their Tanner graphs. We also propose new code design techniques that approach or achieve such theoretical limits.Comment: 30 pages, 5 figures, accepted for publication in IEEE Transactions on Communication

Variations of the McEliece Cryptosystem

Two variations of the McEliece cryptosystem are presented. The first one is based on a relaxation of the column permutation in the classical McEliece scrambling process. This is done in such a way that the Hamming weight of the error, added in the encryption process, can be controlled so that efficient decryption remains possible. The second variation is based on the use of spatially coupled moderate-density parity-check codes as secret codes. These codes are known for their excellent error-correction performance and allow for a relatively low key size in the cryptosystem. For both variants the security with respect to known attacks is discussed