8 research outputs found
Oblivious Parallel RAM: Improved Efficiency and Generic Constructions
Oblivious RAM (ORAM) garbles read/write operations by a client (to
access a remote storage server or a random-access memory) so that an
adversary observing the garbled access sequence cannot infer any
information about the original operations, other than their overall
number. This paper considers the natural setting of Oblivious
Parallel RAM (OPRAM) recently introduced by Boyle, Chung, and
Pass (TCC 2016A), where clients simultaneously access in
parallel the storage server. The clients are additionally
connected via point-to-point links to coordinate their
accesses. However, this additional inter-client communication must
also remain oblivious.
The main contribution of this paper is twofold: We construct the
first OPRAM scheme that (nearly) matches the storage and
server-client communication complexities of the most efficient
single-client ORAM schemes. Our scheme is based on an extension of
Path-ORAM by Stefanov et al (CCS 2013). Moreover, we present a
generic transformation turning any (single-client) ORAM scheme
into an OPRAM scheme
Oblivious Network RAM and Leveraging Parallelism to Achieve Obliviousness
Oblivious RAM (ORAM) is a cryptographic primitive that allows a trusted CPU to securely access untrusted memory, such that the access patterns reveal nothing about sensitive data. ORAM is known to have broad applications in secure processor design and secure multi-party computation for big data. Unfortunately, due to a logarithmic lower bound by Goldreich and Ostrovsky (Journal of the ACM, \u2796), ORAM is bound to incur a moderate cost in practice. In
particular, with the latest developments in ORAM constructions, we are quickly approaching this limit, and the room for performance improvement is small.
In this paper, we consider new models of computation in which the cost of obliviousness can be fundamentally reduced in comparison with the standard ORAM model. We propose the Oblivious Network RAM model of computation, where a CPU communicates with multiple
memory banks, such that the adversary observes only which bank the CPU is communicating with, but not the address oset within each memory bank. In other words, obliviousness within each bank comes for free either because the architecture prevents a malicious party from observing the address accessed within a bank, or because another solution is used to obfuscate memory accesses within each bank and hence we only need to obfuscate communication patterns between the CPU and the memory banks. We present new constructions for obliviously simulating general or parallel programs in the Network RAM model. We describe applications of our new model in secure processor design and in distributed storage applications with a network adversary
Recent Advances in Fully Dynamic Graph Algorithms
In recent years, significant advances have been made in the design and
analysis of fully dynamic algorithms. However, these theoretical results have
received very little attention from the practical perspective. Few of the
algorithms are implemented and tested on real datasets, and their practical
potential is far from understood. Here, we present a quick reference guide to
recent engineering and theory results in the area of fully dynamic graph
algorithms