A Practical Application of Wave-Pipelining Theory on a Adaptive Differential Pulse Code Modulation Coder-Decoder Design

Pipeline architectures are often considered in VLSI designs that require high throughput. The draw-backs for traditional pipelined architectures are the increased area, power, and latency required for implementation. However, with increased design effort, wave-pipelining can be applied as an alternative to a pipelined circuit to reduce the pipeline area, power, and latency while maintaining the original functionality and timing of the overall circuit. The objective of this paper is the successful application of the theories of wave-pipelining in a practical digital system. To accomplish this, the pipelined portion of an Multi-Channel Adaptive Differential Pulse Code Modulation (ADPCM) Coder-Decoder (CODEC) is replaced with a wave pipeline design

Research-study of a self-organizing computer

It is shown that a self organizing system has two main components: an organizable physical part, and a programing part. This report presents the organizable part in the form of a programable hardware and its programing language