An Open Source, Line Rate Datagram Protocol Facilitating Message Resiliency Over an Imperfect Channel

Remote Direct Memory Access (RDMA) is the transfer of data into buffers between two compute nodes that does not require the involvement of a CPU or Operating System (OS). The idea is borrowed from Direct Memory Access (DMA) which allows memory within a compute node to be transferred without transiting through the CPU. RDMA is termed a zero-copy protocol as it eliminates the need to copy data between buffers within the protocol stack. Because of this and other features, RDMA promotes reliable, high throughput and low latency transfer for packet-switched networking. While the benefits of RMDA are well known and available within the general purpose and high performance computing community, only a few open source and portable RDMA capabilities exists for the FPGA community. Within the limited availability of solutions for FPGAs, many rely on standard Internet Protocol. This thesis presents an open source and portable RMDA core that enables line rate scaling for data transfer over packet-switched networks over Ethernet for the FPGA community. An RDMA protocol in which the currency is Datagrams is designed, implemented and tested between two Xilinx FPGA\u27s over a Layer 2 switch. The implementation does not rely on an Internet Protocol and is portable, simple and lightweight. Latency, throughput and area will be reported and discussed. To foster portability, the core was designed and implemented in Bluespec SystemVerilog and does not utilize any vendor specific technologies

Cryptographic application of physical unclonable functions (PUFs)

Physical Unclonable Functions (PUFs) are circuits designed to extract physical randomness from the underlying circuit. This randomness depends on the manufacturing process. It differs for each device enabling chip-level authentication and key generation applications. This thesis has performed research work about PUF based encryption and low power PUFs. First, we present a protocol utilizing a PUF for secure data transmission. Each party has a PUFused for encryption and decryption; this is facilitated by constraining the PUF to be commutative. This framework is evaluated with a primitive permutation network - a barrel shifter. Physical randomness is derived from the delay of different shift paths. Barrel shifter (BS) PUF captures the delay of different shift paths. This delay is entangled with message bits before they are sent across an insecure channel. BS-PUF is implemented using transmission gates; their characteristics ensure same-chip physical commutativity, a necessary property of PUFs designed for encryption. Post-layout simulations of a common centroid layout 8-level barrel shifter in 0.13μm technology assess uniqueness, stability and randomness properties. BS-PUFs pass all selected NIST statistical randomness tests. Stability similar to Ring Oscillator (RO) PUFs under environment variation is shown. Logistic regression of 100,000 plaintext-ciphertext pairs (PCPs) failed to successfully modelBS-PUF behavior. Then we generalize this encryption protocol to work with PUFs other than theBSPUFs. On the other hand, we further explore some low power techniques for building PUFs. Asymmetric layout improved unit path delay variation by as much as 73.2% and uniqueness problem introduced by asymmetric layout is proved to be solvable through Multi-Block entanglement pat-tern. By adopting these 2 techniques, power and area consumption of PUF can be reduced by as much as 44.29% and 39.7%