Efficient floating-point givens rotation unit

This is a post-peer-review, pre-copyedit version of an article published in Circuits, Systems, and Signal Processing.High-throughput QR decomposition is a key operation in many advanced signal processing and communication applications. For some of these applications, using floating-point computation is becoming almost compulsory. However, there are scarce works in hardware implementations of floating-point QR decomposition for embedded systems. In this paper, we propose a very efficient high-throughput floating-point Givens rotation unit for QR decomposition. Moreover, the initial proposed design for conventional number formats is enhanced by using the new Half-Unit Biased format. The provided error analysis shows the effectiveness of our proposals and the trade-off of different implementation parameters. We also present FPGA implementation results and a thorough comparison between both approaches. These implementation results also reveal outstanding improvements compared to other previous similar designs in terms of area, latency, and throughput.This work was supported in part by following Spanish projects: TIN2016-80920-R, and JA2012 P12-TIC-169

A smart monitoring system for bearing fault detection

Rolling element bearings are commonly used in rotating machinery to support shafts, reduce friction, and increase power transmission efficiency. For a machinery system, bearing fault could be the most possible cause of mechanical failures. If bearing defect can be detected at its early stage, mechanical performance degradation and even economic losses can be avoided. Although many signal processing techniques have been proposed in the literature for bearing fault detection, reliable bearing fault diagnosis is still a challenging task in this R&D field, especially in industrial applications. The objective of this work is to develop a smart condition monitoring system and a signal processing technique for bearing fault detection. Firstly, a Field Programmable Gate Arrays (FPGA) based sinusoidal generator is developed to generate controllable sinusoidal waveforms and explore FPGA’s potential applications in a data acquisition system to collect vibration signals. Secondly, an adaptive variational mode decomposition (AVMD) technique is proposed for bearing fault detection. The AVMD includes several steps in processing: 1) Signal characteristics are analyzed to determine the signal center frequency and the related parameters. 2) The ensemble-kurtosis index is suggested to select the optimal intrinsic mode function (IMF) to decompose the target signal. 3) The envelope spectrum analysis is performed using the selected IMF to identify the representative features for bearing fault detection. The effectiveness of the proposed AVMD technique is examined by simulation and experimental tests under different bearing conditions, with the comparison of other related bearing fault techniques