A 2 degree-of-freedom SOI-MEMS translation stage with closed loop positioning

This research contains the design, analysis, fabrication, and characterization of a closed loop XY micro positioning stage. The XY micro positioning stage is developed by adapting parallel-kinematic mechanisms, which have been widely used for macro and meso scale positioning systems, to silicon-based micropositioner. Two orthogonal electrostatic comb drives are connected to moving table through 4-bar mechanism and independent hinges which restrict unwanted rotation in 2-degree-of-freedom translational stage. The XY micro positioning stage is fabricated on SOI wafer with three photolithography patterning processes followed by series of DRIE etching and HF etching to remove buried oxide layer to release the end-effector of the device. The fabricated XY micro positioning stage is shown in Fig1 with SEM images. The device provides a motion range of 20 microns in each direction at the driving voltage of 100V. The resonant frequency of the XY stage under ambient conditions is 811 Hz with a high quality factor of 40 achieved from parallel kinematics. The positioning loop is closed using a COTS capacitance-to-voltage conversion IC and a PID controller built in D-space is used to control position with an uncertainty characterized by a standard distribution of 5.24nm and a approximate closed-loop bandwidth of 27Hz. With the positioning loop, the rise time and settling time for closed-loop system are 50ms and 100ms. With sinusoidal input of ω=1Hz, the maximum phase difference of 108nm from reference input is obtained with total motion range of 8μm

Neuromorphic Hardware In The Loop: Training a Deep Spiking Network on the BrainScaleS Wafer-Scale System

Emulating spiking neural networks on analog neuromorphic hardware offers several advantages over simulating them on conventional computers, particularly in terms of speed and energy consumption. However, this usually comes at the cost of reduced control over the dynamics of the emulated networks. In this paper, we demonstrate how iterative training of a hardware-emulated network can compensate for anomalies induced by the analog substrate. We first convert a deep neural network trained in software to a spiking network on the BrainScaleS wafer-scale neuromorphic system, thereby enabling an acceleration factor of 10 000 compared to the biological time domain. This mapping is followed by the in-the-loop training, where in each training step, the network activity is first recorded in hardware and then used to compute the parameter updates in software via backpropagation. An essential finding is that the parameter updates do not have to be precise, but only need to approximately follow the correct gradient, which simplifies the computation of updates. Using this approach, after only several tens of iterations, the spiking network shows an accuracy close to the ideal software-emulated prototype. The presented techniques show that deep spiking networks emulated on analog neuromorphic devices can attain good computational performance despite the inherent variations of the analog substrate.Comment: 8 pages, 10 figures, submitted to IJCNN 201

A Comprehensive Workflow for General-Purpose Neural Modeling with Highly Configurable Neuromorphic Hardware Systems

In this paper we present a methodological framework that meets novel requirements emerging from upcoming types of accelerated and highly configurable neuromorphic hardware systems. We describe in detail a device with 45 million programmable and dynamic synapses that is currently under development, and we sketch the conceptual challenges that arise from taking this platform into operation. More specifically, we aim at the establishment of this neuromorphic system as a flexible and neuroscientifically valuable modeling tool that can be used by non-hardware-experts. We consider various functional aspects to be crucial for this purpose, and we introduce a consistent workflow with detailed descriptions of all involved modules that implement the suggested steps: The integration of the hardware interface into the simulator-independent model description language PyNN; a fully automated translation between the PyNN domain and appropriate hardware configurations; an executable specification of the future neuromorphic system that can be seamlessly integrated into this biology-to-hardware mapping process as a test bench for all software layers and possible hardware design modifications; an evaluation scheme that deploys models from a dedicated benchmark library, compares the results generated by virtual or prototype hardware devices with reference software simulations and analyzes the differences. The integration of these components into one hardware-software workflow provides an ecosystem for ongoing preparative studies that support the hardware design process and represents the basis for the maturity of the model-to-hardware mapping software. The functionality and flexibility of the latter is proven with a variety of experimental results

Design, fabrication and characterization of monolithic embedded parylene microchannels in silicon substrate

This paper presents a novel channel fabrication technology of bulk-micromachined monolithic embedded polymer channels in silicon substrate. The fabrication process favorably obviates the need for sacrifical materials in surface-micromachined channels and wafer-bonding in conventional bulk-micromachined channels. Single-layer-deposited parylene C (poly-para-xylylene C) is selected as a structural material in the microfabricated channels/columns to conduct life science research. High pressure capacity can be obtained in these channels by the assistance of silicon substrate support to meet the needs of high-pressure loading conditions in microfluidic applications. The fabrication technology is completely compatible with further lithographic CMOS/MEMS processes, which enables the fabricated embedded structures to be totally integrated with on-chip micro/nano-sensors/actuators/structures for miniaturized lab-on-a-chip systems. An exemplary process was described to show the feasibility of combining bulk micromachining and surface micromachining techniques in process integration. Embedded channels in versatile cross-section profile designs have been fabricated and characterized to demonstrate their capabilities for various applications. A quasi-hemi-circular-shaped embedded parylene channel has been fabricated and verified to withstand inner pressure loadings higher than 1000 psi without failure for micro-high performance liquid chromatography (µHPLC) analysis. Fabrication of a high-aspect-ratio (internal channel height/internal channel width, greater than 20) quasi-rectangular-shaped embedded parylene channel has also been presented and characterized. Its implementation in a single-mask spiral parylene column longer than 1.1 m in a 3.3 mm × 3.3 mm square size on a chip has been demonstrated for prospective micro-gas chromatography (µGC) and high-density, high-efficiency separations. This proposed monolithic embedded channel technology can be extensively implemented to fabricate microchannels/columns in high-pressure microfludics and high-performance/high-throughput chip-based micro total analysis systems (µTAS)

Supervisor Localization of Discrete-Event Systems based on State Tree Structures

Recently we developed supervisor localization, a top-down approach to distributed control of discrete-event systems in the Ramadge-Wonham supervisory control framework. Its essence is the decomposition of monolithic (global) control action into local control strategies for the individual agents. In this paper, we establish a counterpart supervisor localization theory in the framework of State Tree Structures, known to be efficient for control design of very large systems. In the new framework, we introduce the new concepts of local state tracker, local control function, and state-based local-global control equivalence. As before, we prove that the collective localized control behavior is identical to the monolithic optimal (i.e. maximally permissive) and nonblocking controlled behavior. In addition, we propose a new and more efficient localization algorithm which exploits BDD computation. Finally we demonstrate our localization approach on a model for a complex semiconductor manufacturing system

Novel Test Fixture for Characterizing MEMS Switch Microcontact Reliability and Performance

In microelectromechanical systems (MEMS) switches, the microcontact is crucial in determining reliability and performance. In the past, actual MEMS devices and atomic force microscopes (AFM)/scanning probe microscopes (SPM)/nanoindentation-based test fixtures have been used to collect relevant microcontact data. In this work, we designed a unique microcontact support structure for improved post-mortem analysis. The effects of contact closure timing on various switching conditions (e.g., cold-switching and hot-switching) was investigated with respect to the test signal. Mechanical contact closing time was found to be approximately 1 us for the contact force ranging from 10–900 μN. On the other hand, for the 1 V and 10 mA circuit condition, electrical contact closing time was about 0.2 ms. The test fixture will be used to characterize contact resistance and force performance and reliability associated with wide range of contact materials and geometries that will facilitate reliable, robust microswitch designs for future direct current (DC) and radio frequency (RF) applications

Ultrafast High-pressure AC Electro-osmotic Pumps for Portable Biomedical Microfluidics

This paper details the development of an integrated AC electro-osmotic (ACEO) microfluidic pump for dilute electrolytes consisting of a long serpentine microchannel lined with three dimensional (3D) stepped electrode arrays. Using low AC voltage (1 Volt rms, 1 kHz), power (5 mW) and current (3.5 mA) in water, the pump is capable of generating a 1.4 kPa head pressure, a 100-fold increase over prior ACEO pumps, and a 1.37 mm/sec effective slip velocity over the electrodes without flow reversal. The integrated ACEO pump can utilize low ionic strength solutions such as distilled water as the working solution to pump physiological strength (100 mM) biological solutions in separate microfluidic devices, with potential applications in portable or implantable biomedical microfluidic devices. As a proof-of-concept experiment, the use of the ACEO pumps for DNA hybridization in a microfluidic microarray is demonstrated