The Interoperability of Things: Interoperable solutions as an enabler for IoT and Web 3.0

This paper presents an overview of the interoperability concepts along with the challenges for the IoT domain and the upcoming Web 3.0. We identify four levels of interoperability and the relevant solutions for accomplishing vertical and horizontal compatibility between the various layers of a modern IoT ecosystem, referred to as: technological, syntactic, semantic, and organizational interoperability. The goal is to achieve cross-domain interaction and facilitate the proper usage and management of the provided IoT services and applications. An interoperability framework is also proposed where the involved system components can cooperate and offer the seamless operation from the device to the backend framework. This by-design end-to-end interoperation enables the interplay of several complex service composition settings and the management of the system via patterns. The overall proposal is adopted by the EU funded project SEMIoTICS as an enabler towards the IoT and Web 3.0, even when products from different vendors are utilized

Lightweight authenticated encryption for embedded on-chip systems

Summarization: Embedded systems are routinely deployed in critical infrastructures nowadays, therefore their security is increasingly important. This, combined with the pressing requirement of deploying massive numbers of low-cost and low-energy embedded devices, stimulates the evolution of lightweight cryptography and other green-computing security mechanisms. New crypto-primitives are being proposed that offer moderate security and produce compact implementations. In this article, we present a lightweight authenticated encryption scheme based on the integrated hardware implementation of the lightweight block cipher PRESENT and the lightweight hash function SPONGENT. The presented combination of a cipher and a hash function is appropriate for implementing authenticated encryption schemes that are commonly utilized in one-way and mutual authentication protocols. We exploit their inner structure to discover hardware elements usable by both primitives, thus reducing the circuit’s size. The integrated versions demonstrate a 27% reduction in hardware area compared to the simple combination of the two primitives. The resulting solution is ported on a field-programmable gate array (FPGA) and a complete security application with input/output from a universal asynchronous receiver/transmitter (UART) gate is created. In comparison with similar implementations in hardware and software, the proposed scheme represents a better overall status.Παρουσιάστηκε στο: Information Security Journa