Short-length Low-density Parity-check Codes: Construction and Decoding Algorithms

Error control coding is an essential part of modern communications systems. LDPC codes have been demonstrated to offer performance near the fundamental limits of channels corrupted by random noise. Optimal maximum likelihood decoding of LDPC codes is too complex to be practically useful even at short block lengths and so a graph-based message passing decoder known as the belief propagation algorithm is used instead. In fact, on graphs without closed paths known as cycles the iterative message passing decoding is known to be optimal and may converge in a single iteration, although identifying the message update schedule which allows single-iteration convergence is not trivial. At finite block lengths graphs without cycles have poor minimum distance properties and perform poorly even under optimal decoding. LDPC codes with large block length have been demonstrated to offer performance close to that predicted for codes of infinite length, as the cycles present in the graph are quite long. In this thesis, LDPC codes of shorter length are considered as they offer advantages in terms of latency and complexity, at the cost of performance degradation from the increased number of short cycles in the graph. For these shorter LDPC codes, the problems considered are: First, improved construction of structured and unstructured LDPC code graphs of short length with a view to reducing the harmful effects of the cycles on error rate performance, based on knowledge of the decoding process. Structured code graphs are particularly interesting as they allow benefits in encoding and decoding complexity and speed. Secondly, the design and construction of LDPC codes for the block fading channel, a particularly challenging scenario from the point of view of error control code design. Both established and novel classes of codes for the channel are considered. Finally the decoding of LDPC codes by the belief propagation algorithm is considered, in particular the scheduling of messages passed in the iterative decoder. A knowledge-aided approach is developed based on message reliabilities and residuals to allow fast convergence and significant improvements in error rate performance

Near-capacity fixed-rate and rateless channel code constructions

Fixed-rate and rateless channel code constructions are designed for satisfying conflicting design tradeoffs, leading to codes that benefit from practical implementations, whilst offering a good bit error ratio (BER) and block error ratio (BLER) performance. More explicitly, two novel low-density parity-check code (LDPC) constructions are proposed; the first construction constitutes a family of quasi-cyclic protograph LDPC codes, which has a Vandermonde-like parity-check matrix (PCM). The second construction constitutes a specific class of protograph LDPC codes, which are termed as multilevel structured (MLS) LDPC codes. These codes possess a PCM construction that allows the coexistence of both pseudo-randomness as well as a structure requiring a reduced memory. More importantly, it is also demonstrated that these benefits accrue without any compromise in the attainable BER/BLER performance. We also present the novel concept of separating multiple users by means of user-specific channel codes, which is referred to as channel code division multiple access (CCDMA), and provide an example based on MLS LDPC codes. In particular, we circumvent the difficulty of having potentially high memory requirements, while ensuring that each user’s bits in the CCDMA system are equally protected. With regards to rateless channel coding, we propose a novel family of codes, which we refer to as reconfigurable rateless codes, that are capable of not only varying their code-rate but also to adaptively modify their encoding/decoding strategy according to the near-instantaneous channel conditions. We demonstrate that the proposed reconfigurable rateless codes are capable of shaping their own degree distribution according to the nearinstantaneous requirements imposed by the channel, but without any explicit channel knowledge at the transmitter. Additionally, a generalised transmit preprocessing aided closed-loop downlink multiple-input multiple-output (MIMO) system is presented, in which both the channel coding components as well as the linear transmit precoder exploit the knowledge of the channel state information (CSI). More explicitly, we embed a rateless code in a MIMO transmit preprocessing scheme, in order to attain near-capacity performance across a wide range of channel signal-to-ratios (SNRs), rather than only at a specific SNR. The performance of our scheme is further enhanced with the aid of a technique, referred to as pilot symbol assisted rateless (PSAR) coding, whereby a predetermined fraction of pilot bits is appropriately interspersed with the original information bits at the channel coding stage, instead of multiplexing pilots at the modulation stage, as in classic pilot symbol assisted modulation (PSAM). We subsequently demonstrate that the PSAR code-aided transmit preprocessing scheme succeeds in gleaning more information from the inserted pilots than the classic PSAM technique, because the pilot bits are not only useful for sounding the channel at the receiver but also beneficial for significantly reducing the computational complexity of the rateless channel decoder

Evaluation of 3GPP Technology Candidate Towards Fourth Generation Mobile

[ES] LTE-Advanced es una de las tecnologías candidatas para convertirse en la próxima generación de comunicaciones móviles (4G). Es responsabilidad de la Unión Internacional de las Telecomunicaciones (UIT) evaluar esta tecnología a través de los Grupos de Evaluación Externos (GEE), entre los cuales se encuentra el consorcio WINNER+ (Wireless World Initiative New Radio +). El Grupo de Comunicaciones Móviles (GCM) del Instituto de Telecomunicaciones y Aplicaciones Multimedia, como socio de WINNER+, está analizando diferentes técnicas para optimizar la red de acceso radio LTEAdvanced. Esta tesina de máster se enmarca dentro de este trabajo, y especialmente, en la comparación de los turbo-códigos (TC) y Low Density Partity Check (LDPC) para anchos de banda de hasta 100 MHz. Los resultados obtenidos muestran que tanto los TC como los LDPC son buenos codificadores para esos tamaños de bloque. Los códigos LDPC representan una mejora de 0.5 dB como máximo respecto a los TC. Además, se ha realizado un estudio de prestaciones de la capa física de LTE en el enlace ascendente y descendente, junto con una propuesta de calibración de este tipo de simulaciones de enlace.[EN] LTE-Advanced is one promising candidate technology to become part of the next generation mobile (4G). It is up to the International Telecommunication Union (ITU) standardization body to assess this technology through the External Evaluation Groups (EEG), being one of them the WINNER+ project (Wireless World Initiative New Radio +). The Mobile Communications Group (MCG) of the Institute of Telecommunications and Multimedia Applications, as a partner of WINNER+, is currently analyzing and proposing different techniques with the aim of optimizing the LTE-Advanced radio access network. This Master Thesis is part of this activity and, especially, on the comparison of Turbo (TC) and Low Density Parity Check (LDPC) codes for bandwidths up to 100 MHz. Results prove that both TC and LDPC codes are good encoders for those block sizes. The LDPC codes only entail a maximum 0.5 dB improvement as compared with TC. In addition to this assessment, a performance study of LTE downlink/uplink (DL/ UL) physical layer together with a calibration proposal for link level simulations has been carried out.Cabrejas Peñuelas, J. (2009). Evaluation of 3GPP Technology Candidate Towards Fourth Generation Mobile. http://hdl.handle.net/10251/27347.Archivo delegad