Jitter-based analysis and discussion of burst assembly algorithms

Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. J. Aracil, J. A. Hernández, K. Vlachos, and E. Varvarigos, "Jitter-based analysis and discussion of burst assembly algorithms", in 3rd International Conference on Broadband Communications, Networks and Systems, BROADNETS 2006, p. 1-3This work provides a jitter analysis of size-based burst assembly algorithms and also discusses other burst assembly algorithms that use the packet delay as the assembly threshold to provide a bound on jitter.This work has been funded by the European Union e-Photon/ONe+ projec