Unbiased All-Optical Random-Number Generator

The generation of random bits is of enormous importance in modern information science. Cryptographic security is based on random numbers which require a physical process for their generation. This is commonly performed by hardware random number generators. These exhibit often a number of problems, namely experimental bias, memory in the system, and other technical subtleties, which reduce the reliability in the entropy estimation. Further, the generated outcome has to be post-processed to "iron out" such spurious effects. Here, we present a purely optical randomness generator, based on the bi-stable output of an optical parametric oscillator. Detector noise plays no role and no further post-processing is required. Upon entering the bi-stable regime, initially the resulting output phase depends on vacuum fluctuations. Later, the phase is rigidly locked and can be well determined versus a pulse train, which is derived from the pump laser. This delivers an ambiguity-free output, which is reliably detected and associated with a binary outcome. The resulting random bit stream resembles a perfect coin toss and passes all relevant randomness measures. The random nature of the generated binary outcome is furthermore confirmed by an analysis of resulting conditional entropies.Comment: 10 pages, 4 figure

Hybrid receiver study

The results are presented of a 4 month study to design a hybrid analog/digital receiver for outer planet mission probe communication links. The scope of this study includes functional design of the receiver; comparisons between analog and digital processing; hardware tradeoffs for key components including frequency generators, A/D converters, and digital processors; development and simulation of the processing algorithms for acquisition, tracking, and demodulation; and detailed design of the receiver in order to determine its size, weight, power, reliability, and radiation hardness. In addition, an evaluation was made of the receiver's capabilities to perform accurate measurement of signal strength and frequency for radio science missions

A high speed oscillator-based truly random number source for cryptographic applications on a Smart Card IC

Special Issue on Cryptographic Hardware and Embedded System

Theory of phaselock techniques as applied to aerospace transponders

Phaselock techniques as applied to aerospace transponder

True random number generator implemented in 130 nm CMOS nanotechnology

Random generators systems have the capacity to generate cryptographic keys which, when mixed with the in formation, hide it in an efficient and timely manner. There are two categories of RNG, being truly random (TRNG) or pseudorandom (PRNG). To study the entropy source based on the noise of an oscillator, and to achieve that, an RNG circuit was designed to have a low power consumption, a high randomness and a low cost and area usage. The chosen architecture for this paper is a hybrid RNG, which uses oscillators and a chaotic circuit to generate the random bits. With the simulation of the circuit, it was found to be at the objectives mark, having a low power consumption of 1.19 mW, a high throughput of 25 Mbit/s and an energy per bit of 47.6 pJ/bit. However, due to limitations with the simulation, it wasn’t possible to run all the statistical tests, although all the ran tests were passed.info:eu-repo/semantics/publishedVersio

Circuit Techniques for Low-Power and Secure Internet-of-Things Systems

The coming of Internet of Things (IoT) is expected to connect the physical world to the cyber world through ubiquitous sensors, actuators and computers. The nature of these applications demand long battery life and strong data security. To connect billions of things in the world, the hardware platform for IoT systems must be optimized towards low power consumption, high energy efficiency and low cost. With these constraints, the security of IoT systems become a even more difficult problem compared to that of computer systems. A new holistic system design considering both hardware and software implementations is demanded to face these new challenges. In this work, highly robust and low-cost true random number generators (TRNGs) and physically unclonable functions (PUFs) are designed and implemented as security primitives for secret key management in IoT systems. They provide three critical functions for crypto systems including runtime secret key generation, secure key storage and lightweight device authentication. To achieve robustness and simplicity, the concept of frequency collapse in multi-mode oscillator is proposed, which can effectively amplify the desired random variable in CMOS devices (i.e. process variation or noise) and provide a runtime monitor of the output quality. A TRNG with self-tuning loop to achieve robust operation across -40 to 120 degree Celsius and 0.6 to 1V variations, a TRNG that can be fully synthesized with only standard cells and commercial placement and routing tools, and a PUF with runtime filtering to achieve robust authentication, are designed based upon this concept and verified in several CMOS technology nodes. In addition, a 2-transistor sub-threshold amplifier based "weak" PUF is also presented for chip identification and key storage. This PUF achieves state-of-the-art 1.65% native unstable bit, 1.5fJ per bit energy efficiency, and 3.16% flipping bits across -40 to 120 degree Celsius range at the same time, while occupying only 553 feature size square area in 180nm CMOS. Secondly, the potential security threats of hardware Trojan is investigated and a new Trojan attack using analog behavior of digital processors is proposed as the first stealthy and controllable fabrication-time hardware attack. Hardware Trojan is an emerging concern about globalization of semiconductor supply chain, which can result in catastrophic attacks that are extremely difficult to find and protect against. Hardware Trojans proposed in previous works are based on either design-time code injection to hardware description language or fabrication-time modification of processing steps. There have been defenses developed for both types of attacks. A third type of attack that combines the benefits of logical stealthy and controllability in design-time attacks and physical "invisibility" is proposed in this work that crosses the analog and digital domains. The attack eludes activation by a diverse set of benchmarks and evades known defenses. Lastly, in addition to security-related circuits, physical sensors are also studied as fundamental building blocks of IoT systems in this work. Temperature sensing is one of the most desired functions for a wide range of IoT applications. A sub-threshold oscillator based digital temperature sensor utilizing the exponential temperature dependence of sub-threshold current is proposed and implemented. In 180nm CMOS, it achieves 0.22/0.19K inaccuracy and 73mK noise-limited resolution with only 8865 square micrometer additional area and 75nW extra power consumption to an existing IoT system.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/138779/1/kaiyuan_1.pd

Optical Communication with Semiconductor Laser Diode

Theoretical and experimental performance limits of a free-space direct detection optical communication system were studied using a semiconductor laser diode as the optical transmitter and a silicon avalanche photodiode (APD) as the receiver photodetector. Optical systems using these components are under consideration as replacements for microwave satellite communication links. Optical pulse position modulation (PPM) was chosen as the signal format. An experimental system was constructed that used an aluminum gallium arsenide semiconductor laser diode as the transmitter and a silicon avalanche photodiode photodetector. The system used Q=4 PPM signaling at a source data rate of 25 megabits per second. The PPM signal format requires regeneration of PPM slot clock and word clock waveforms in the receiver. A nearly exact computational procedure was developed to compute receiver bit error rate without using the Gaussion approximation. A transition detector slot clock recovery system using a phase lock loop was developed and implemented. A novel word clock recovery system was also developed. It was found that the results of the nearly exact computational procedure agreed well with actual measurements of receiver performance. The receiver sensitivity achieved was the closest to the quantum limit yet reported for an optical communication system of this type