Analysis and equalization of data-dependent jitter

Data-dependent jitter limits the bit-error rate (BER) performance of broadband communication systems and aggravates synchronization in phase- and delay-locked loops used for data recovery. A method for calculating the data-dependent jitter in broadband systems from the pulse response is discussed. The impact of jitter on conventional clock and data recovery circuits is studied in the time and frequency domain. The deterministic nature of data-dependent jitter suggests equalization techniques suitable for high-speed circuits. Two equalizer circuit implementations are presented. The first is a SiGe clock and data recovery circuit modified to incorporate a deterministic jitter equalizer. This circuit demonstrates the reduction of jitter in the recovered clock. The second circuit is a MOS implementation of a jitter equalizer with independent control of the rising and falling edge timing. This equalizer demonstrates improvement of the timing margins that achieve 10/sup -12/ BER from 30 to 52 ps at 10 Gb/s

Neuromorphic Learning towards Nano Second Precision

Temporal coding is one approach to representing information in spiking neural networks. An example of its application is the location of sounds by barn owls that requires especially precise temporal coding. Dependent upon the azimuthal angle, the arrival times of sound signals are shifted between both ears. In order to deter- mine these interaural time differences, the phase difference of the signals is measured. We implemented this biologically inspired network on a neuromorphic hardware system and demonstrate spike-timing dependent plasticity on an analog, highly accelerated hardware substrate. Our neuromorphic implementation enables the resolution of time differences of less than 50 ns. On-chip Hebbian learning mechanisms select inputs from a pool of neurons which code for the same sound frequency. Hence, noise caused by different synaptic delays across these inputs is reduced. Furthermore, learning compensates for variations on neuronal and synaptic parameters caused by device mismatch intrinsic to the neuromorphic substrate.Comment: 7 pages, 7 figures, presented at IJCNN 2013 in Dallas, TX, USA. IJCNN 2013. Corrected version with updated STDP curves IJCNN 201

All-Optical Clock Recovery for NRZ-DPSK Signals

We experimentally demonstrate an optical clock recovery scheme for nonreturn-to-zero differential phase shifting keying (NRZ-DPSK) data. By using an optical circuit made by a proper fiber Bragg filter and a Fabry-Pérot based clock extraction circuit, we obtain a stable and low jitter 10-GHz optical clock signal. This signal shows comparable performance with the original electrical clock in bit-error-rate measurements and oscilloscope triggering operation

Nonlinear loop mirror-based all-optical signal processing in fiber-optic communications

All-optical data processing is expected to play a major role in future optical communications. The fiber nonlinear optical loop mirror (NOLM) is a valuable tool in optical signal processing applications. This paper presents an overview of our recent advances in developing NOLM-based all-optical processing techniques for application in fiber-optic communications. The use of in-line NOLMs as a general technique for all-optical passive 2R (reamplification, reshaping) regeneration of return-to-zero (RZ) on-off keyed signals in both high-speed, ultralong-distance transmission systems and terrestrial photonic networks is reviewed. In this context, a theoretical model enabling the description of the stable propagation of carrier pulses with periodic all-optical self-regeneration in fiber systems with in-line deployment of nonlinear optical devices is presented. A novel, simple pulse processing scheme using nonlinear broadening in normal dispersion fiber and loop mirror intensity filtering is described, and its employment is demonstrated as an optical decision element at a RZ receiver as well as an in-line device to realize a transmission technique of periodic all-optical RZ-nonreturn-to-zero-like format conversion. The important issue of phase-preserving regeneration of phase-encoded signals is also addressed by presenting a new design of NOLM based on distributed Raman amplification in the loop fiber. © 2008 Elsevier Inc. All rights reserved

A 3-step Low-latency Low-Power Multichannel Time-to-Digital Converter based on Time Residual Amplifier

This paper proposes and evaluates a novel architecture for a low-power Time-to-Digital Converter with high resolution, optimized for both integration in multichannel chips and high rate operation (40 Mconversion/s/channel). This converter is based on a three-step architecture. The first step uses a counter whereas the following ones are based on two kinds of Delay Line structures. A programmable time amplifier is used between the second and third steps to reach the final resolution of 24.4 ps in the standard mode of operation. The system makes use of common continuously stabilized master blocks that control trimmable slave blocks, in each channel, against the effects of global PVT variations. Thanks to this structure, the power consumption of a channel is considerably reduced when it does not process a hit, and limited to 2.2 mW when it processes a hit. In the 130 nm CMOS technology used for the prototype, the area of a TDC channel is only 0.051 mm2. This compactness combined with low power consumption is a key advantage for integration in multi-channel front-end chips. The performance of this new structure has been evaluated on prototype chips. Measurements show excellent timing performance over a wide range of operating temperatures (-40{\deg}C to 60{\deg}C) in agreement with our expectations. For example, the measured timing integral nonlinearity is better than 1 LSB (25 ps) and the overall timing precision is better than 21 ps RMS

Shuttle Ku-band and S-band communications implementations study

The interfaces between the Ku-band system and the TDRSS, between the S-band system and the TDRSS, GSTDN and SGLS networks, and between the S-band payload communication equipment and the other Orbiter avionic equipment were investigated. The principal activities reported are: (1) performance analysis of the payload narrowband bent-pipe through the Ku-band communication system; (2) performance evaluation of the TDRSS user constraints placed on the S-band and Ku-band communication systems; (3) assessment of the shuttle-unique S-band TDRSS ground station false lock susceptibility; (4) development of procedure to make S-band antenna measurements during orbital flight; (5) development of procedure to make RFI measurements during orbital flight to assess the performance degradation to the TDRSS S-band communication link; and (6) analysis of the payload interface integration problem areas