Probabilistic Schedulability Analysis for Precedence Constrained Tasks on Partitioned Multi-core

International audienceThe design of cyber-physical systems (CPSs) is facing the explosion of new functionalities requiring increased computation capacities and, thus, the introduction of multi-core processors. Moreover, some functionalities may impose precedence constraints between the programs implementing these new functionalities. While important effort has been dedicated to the scheduling of precedence constraints tasks on multi-core processors, existing work considers either partitioned scheduling for a single precedence graph defining precedence constraints between tasks, or global scheduling policies.In this paper, we consider partitioned scheduling for multiple precedence graphs defining precedence constraints between tasks. The variability of execution times and of communication times is described by probability distributions. We propose a new response time analysis over-performing existing ILP-based results. Thanks to its scalability, our solution is extendable to a probabilistic version and we validate it on a PX4 drone autopilot. Beside this autopilot for our experiments, we implemented a probabilistic extension of a multi-core processor simulator, SimSo. A priority assignment heuristic allowing parallel executions is also proposed. Thanks to its adaptation to partitioned scheduling, our heuristic has better performances than existing solutions and its performances are, also, compared against a genetic-based heuristic

Precise Response Time Analysis for Multiple DAG Tasks with Intra-task Priority Assignment

In many real-time application domains, there are execution dependencies, such tasks may be formulated as multiple Directed Acyclic Graphs (DAGs) and scheduled with intra-task (i.e., intra-DAG) priority assignment. The worst-case completion time of a DAG must be bounded and schedulability analysis must be conducted during the design phase to estimate the required hardware resources. Typical examples include automotive systems and Ultra-Reliable Low Latency Communications (URLLC), which is the ``to-business'' protocol in 5G technologies, deployed in industrial automation for instance. To bound the execution time of multiple DAGs, there are two key factors to analyze: the intra-task interference for a single DAG and the inter-task interference between DAGs. While extensive efforts have been invested, the existing methods either still contain a large degree of pessimism or are even erroneous due to errors in the derived analysis. In this paper, we first provide an in-depth analysis of the limitation and defects of the existing methods. Inspired by these observations, we construct novel response time analysis for multiple DAG tasks with arbitrary intra-task priority assignment. Our analysis precisely accounts for both the intra- and inter-task interference by fully exploring the node parallelism in each DAG as well as between DAGs. Extensive experimental results show that the proposed analysis obtains tighter bounds and improves the system scheduability by at least 300\% compared to state-of-the-art approaches. This improvement is even larger when the scheduling pressure is relatively high, up to 100\% versus 0\% in many cases. This work notably advances the use of response time analysis in the industry. Practitioners have to resort to either potentially unsafe measurement results or significant resource over-provisioning when precise analysis is unavailable

Response Time Analysis of Tasking Framework Task Chains

Multi-core processors have been increasingly utilized in general computing and modern embedded applications for their potential to maximize system throughput. Parallel frameworks allow programmers to make the most of parallelism without having the burden of understanding the underlying architecture. However, real-time systems comprise tasks governed by stringent timing requirements, which the parallel frameworks do not support. There is a need to analyze a computation model that adapts both advantages. The analysis of parallel real-time applications modeled as Directed Acyclic Graph (DAG) tasks scheduled on multi-core platforms has been intensively studied in recent years. A real-time task can be modeled as periodic and sporadic tasks. In recent years, sporadic tasks have been modeled as periodic by considering the maximum arrival frequency as the period. Current studies provide an analysis of the challenges faced for scheduling real-time tasks modeled as DAG tasks on multi-core processors where all the subtasks (fragments of the task) are consigned to and executed by the worker threads of a thread pool by restricting the maximum parallelism at any point of execution by the number of threads in the thread pool. However, the existing work dispatches the subtasks to the threads in a non-deterministic way, i.e., the execution order of the subtasks is not contemplated. The work done here proves that the intra-task priorities have a notable impact on the worst-case response time. Furthermore, it confirms that the upper bound of response time computed by modeling sporadic tasks as periodic is pessimistic. An algorithm is introduced that allows analyzing a safe upper bound for the response time by controlling the execution order. Moreover, a function is utilized to model sporadic tasks without maximal arrival frequency to achieve a less pessimistic result. An analysis is made to derive a worst-case response time for a task set scheduled by a preemptive global fixed-priority scheduler, wherein each task has intra-task priorities assigned. The work is further extended by providing experiments with randomly created DAG tasks showing that the proposed method outperforms the current state-of-the-art methods