Integer Arithmetic without Arithmetic Addition

Revisiting long established conventions has proven very fertile in many a case. Let’s then revisit the premise that arithmetic must be constructed with the arithmetic addition as its foundation. Here we explore an arithmetic realm over integers without invoking the quintessential operation of addition. We propose an arithmetic constructed over a fundamental mapping of one set of integers into another. We start and focus here on mapping an arbitrary number of integers to a single integer, and further limit our investigation to a mapping procedure that views the input integers as a set of conflicting answers to a binary question, and attempt to figure out the single integer that best reflects the combined “wisdom” of the input answers. Thereby we construct the proposed arithmetic as ground tool for discriminant analysis. On the other end, the many-to-one mapping suggests this arithmetic as a fundamental hashing function, and the complexity of data loss suggests a new primitive for asymmetric cryptography. This arithmetic evolved from practical algorithms used by the author in his engineering practice, where the original name was BiPSA: Binary Polling Scenario Analysis. For continuity purposes we carry on the name. This article focuses on the skeleton arithmetic. Applications and substantiation will follow

Design of ALU and Cache Memory for an 8 bit ALU

The design of an ALU and a Cache memory for use in a high performance processor was examined in this thesis. Advanced architectures employing increased parallelism were analyzed to minimize the number of execution cycles needed for 8 bit integer arithmetic operations. In addition to the arithmetic unit, an optimized SRAM memory cell was designed to be used as cache memory and as fast Look Up Table. The ALU consists of stand alone units for bit parallel computation of basic integer arithmetic operations. Addition and subtraction were performed using Kogge Stone parallel prefix hardware operating at 330MHz. A high performance multiplier was built using Radix 4 Modified Booth Encoder (MBE) and a Wallace Tree summation array. The multiplier requires single clock cycle for 8 bit integer multiplication and operates at a maximum frequency of 100MHz. Multiplicative division hardware was built for executing both integer division and square root. The division hardware computes 8-bit division and square root in 4 clock cycles. Multiplier forms the basic building block of all these functional units, making high level of resource sharing feasible with this architecture. The optimal operating frequency for the arithmetic unit is 70MHz. A 6T CMOS SRAM cell measuring 90 µm2 was designed using minimum size transistors. The layout allows for horizontal overlap resulting in effective area of 76 µm2 for an 8x8 array. By substituting equivalent bit line capacitance of P4 L1 Cache, the memory was simulated to have a read time of 3.27ns. An optimized set of test vectors were identified to enable high fault coverage without the need for any additional test circuitry. Sixteen test cases were identified that would toggle all the nodes and provide all possible inputs to the sub units of the multiplier. A correlation based semi automatic method was investigated to facilitate test case identification for large multipliers. This method of testability eliminates performance and area overhead associated with conventional testability hardware. Bottom up design methodology was employed for the design. The performance and area metrics are presented along with estimated power consumption. A set of Monte Carlo analysis was carried out to ensure the dependability of the design under process variations as well as fluctuations in operating conditions. The arithmetic unit was found to require a total die area of 2mm2 (approx.) in 0.35 micron process

On Certain Axiomatizations of Arithmetic of Natural and Integer Numbers

The systems of arithmetic discussed in this work are non-elementary theories. In this paper, natural numbers are characterized axiomatically in two dierent ways. We begin by recalling the classical set P of axioms of Peano’s arithmetic of natural numbers proposed in 1889 (including such primitive notions as: set of natural numbers, zero, successor of natural number) and compare it with the set W of axioms of this arithmetic (including the primitive notions like: set of natural numbers and relation of inequality) proposed by Witold Wilkosz, a Polish logician, philosopher and mathematician, in 1932. The axioms W are those of ordered sets without largest element, in which every non-empty set has a least element, and every set bounded from above has a greatest element. We show that P and W are equivalent and also that the systems of arithmetic based on W or on P, are categorical and consistent. There follows a set of intuitive axioms PI of integers arithmetic, modelled on P and proposed by B. Iwanuś, as well as a set of axioms WI of this arithmetic, modelled on the W axioms, PI and WI being also equivalent, categorical and consistent. We also discuss the problem of independence of sets of axioms, which were dealt with earlier

An Analysis of Arithmetic Constraints on Integer Intervals

Arithmetic constraints on integer intervals are supported in many constraint programming systems. We study here a number of approaches to implement constraint propagation for these constraints. To describe them we introduce integer interval arithmetic. Each approach is explained using appropriate proof rules that reduce the variable domains. We compare these approaches using a set of benchmarks. For the most promising approach we provide results that characterize the effect of constraint propagation. This is a full version of our earlier paper, cs.PL/0403016.Comment: 44 pages, to appear in 'Constraints' journa

Quantization and Training of Neural Networks for Efficient Integer-Arithmetic-Only Inference

The rising popularity of intelligent mobile devices and the daunting computational cost of deep learning-based models call for efficient and accurate on-device inference schemes. We propose a quantization scheme that allows inference to be carried out using integer-only arithmetic, which can be implemented more efficiently than floating point inference on commonly available integer-only hardware. We also co-design a training procedure to preserve end-to-end model accuracy post quantization. As a result, the proposed quantization scheme improves the tradeoff between accuracy and on-device latency. The improvements are significant even on MobileNets, a model family known for run-time efficiency, and are demonstrated in ImageNet classification and COCO detection on popular CPUs.Comment: 14 pages, 12 figure

A Survey of Satisfiability Modulo Theory

Satisfiability modulo theory (SMT) consists in testing the satisfiability of first-order formulas over linear integer or real arithmetic, or other theories. In this survey, we explain the combination of propositional satisfiability and decision procedures for conjunctions known as DPLL(T), and the alternative "natural domain" approaches. We also cover quantifiers, Craig interpolants, polynomial arithmetic, and how SMT solvers are used in automated software analysis.Comment: Computer Algebra in Scientific Computing, Sep 2016, Bucharest, Romania. 201

Presburger arithmetic, rational generating functions, and quasi-polynomials

Presburger arithmetic is the first-order theory of the natural numbers with addition (but no multiplication). We characterize sets that can be defined by a Presburger formula as exactly the sets whose characteristic functions can be represented by rational generating functions; a geometric characterization of such sets is also given. In addition, if p=(p_1,...,p_n) are a subset of the free variables in a Presburger formula, we can define a counting function g(p) to be the number of solutions to the formula, for a given p. We show that every counting function obtained in this way may be represented as, equivalently, either a piecewise quasi-polynomial or a rational generating function. Finally, we translate known computational complexity results into this setting and discuss open directions.Comment: revised, including significant additions explaining computational complexity results. To appear in Journal of Symbolic Logic. Extended abstract in ICALP 2013. 17 page