19,803 research outputs found

    Is the State still in International Relations Theorising?

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    From 1945 to date, the state has been at the centre of debates in IR theorizing. While the anti-statist theorists had contested and are still contesting its centrality in IR theorizing, the unrepentant state-centric theorists even in the era of technological globalization still consider it, the fulcrum of IR. This paper in a discursive cum historical fashion, drawn mainly from secondary source, examined the nature of the debates in order to decipher its limit or limitlessness in comtemporary IR theorising. The paper, after a careful diagnosis of the concept of the state as well as undergoing the genealogical survey of state centrism in IR theorising, concludes that the state though is still the primary actor in IR but the empirical realities of the post WWII World have confirmed that it is no longer, what it used to be. Hence, it has limits in contemporary IR theorizing

    The Matter of Entrepreneurial Learning: A Literature Review

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    This paper is a comprehensive review of the entrepreneurial learning literature and its engagement with the material aspects of entrepreneurship, as part of the “material turn” in the social sciences. Drawing on actor-network theory, we construct a classificatory scheme and an evaluative matrix to find that this field is dominated by an anthropocentric bias and cognitivist approaches which largely ignore issues of materiality in entrepreneurship. However we also identify some heterogeneous network-based conceptualisations of entrepreneurial learning which could provide the foundations for more materially aware approaches. We conclude by calling for a material turn in entrepreneurial learning and outline some possible avenues for it

    Cyber-Physical Systems for Micro-/Nano-assembly Operations: a Survey

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    Abstract Purpose of Review Latest requirements of the global market force manufacturing systems to a change for a new production paradigm (Industry 4.0). Cyber-Physical Systems (CPS) appear as a solution to be deployed in different manufacturing fields, especially those with high added value and technological complexity, high product variants, and short time to market. In this sense, this paper aims at reviewing the introduction level of CPS technologies in micro/nano-manufacturing and how these technologies could cope with these challenging manufacturing requirements. Recent Findings The introduction of CPS is still in its infancy on many industrial applications, but it actually demonstrates its potential to support future manufacturing paradigm. However, only few research works in micro/nano-manufacturing considered CPS frameworks, since the concept barely appeared a decade ago. Summary Some contributions have revealed the potential of CPS technologies to improve manufacturing performance which may be scaled to the micro/nano-manufacturing. IoT-based frameworks with VR/AR technologies allow distributed and collaborative systems, or agent-based architectures with advance algorithm implementations that improve the flexibility and performance of micro-/nano-assembly operations. Future research of CPS in micro-/nano-assembly operations should be followed by more studies of its technical deployment showing its implications under other perspectives, i.e. sustainable, economic, and social point of views, to take full advance of all its features

    Automatic Throughput and Critical Path Analysis of x86 and ARM Assembly Kernels

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    Useful models of loop kernel runtimes on out-of-order architectures require an analysis of the in-core performance behavior of instructions and their dependencies. While an instruction throughput prediction sets a lower bound to the kernel runtime, the critical path defines an upper bound. Such predictions are an essential part of analytic (i.e., white-box) performance models like the Roofline and Execution-Cache-Memory (ECM) models. They enable a better understanding of the performance-relevant interactions between hardware architecture and loop code. The Open Source Architecture Code Analyzer (OSACA) is a static analysis tool for predicting the execution time of sequential loops. It previously supported only x86 (Intel and AMD) architectures and simple, optimistic full-throughput execution. We have heavily extended OSACA to support ARM instructions and critical path prediction including the detection of loop-carried dependencies, which turns it into a versatile cross-architecture modeling tool. We show runtime predictions for code on Intel Cascade Lake, AMD Zen, and Marvell ThunderX2 micro-architectures based on machine models from available documentation and semi-automatic benchmarking. The predictions are compared with actual measurements.Comment: 6 pages, 3 figure
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