Improving random number generators by chaotic iterations. Application in data hiding

In this paper, a new pseudo-random number generator (PRNG) based on chaotic iterations is proposed. This method also combines the digits of two XORshifts PRNGs. The statistical properties of this new generator are improved: the generated sequences can pass all the DieHARD statistical test suite. In addition, this generator behaves chaotically, as defined by Devaney. This makes our generator suitable for cryptographic applications. An illustration in the field of data hiding is presented and the robustness of the obtained data hiding algorithm against attacks is evaluated.Comment: 6 pages, 8 figures, In ICCASM 2010, Int. Conf. on Computer Application and System Modeling, Taiyuan, China, pages ***--***, October 201

On the design of a family of CI pseudo-random number generators

Chaos and its applications in the field of secure communications have attracted a lot of attention. Chaos-based pseudo-random number generators are critical to guarantee security over open networks as the Internet. We have previously demonstrated that it is possible to define such generators with good statistical properties by using a tool called "chaotic iterations", which depends on an iteration function. An approach to find update functions such that the associated generator presents a random-like and chaotic behavior is proposed in this research work. To do so, we use the vectorial Boolean negation as a prototype and explain how to modify this iteration function without deflating the good properties of the associated generator. Simulation results and basic security analysis are then presented to evaluate the randomness of this new family of generators.Comment: 4 pages, In WICOM'11, 7th Int. IEEE Conf. on Wireless Communications, Networking and Mobile Computing, Wuhan, China, pages 1--4, September 201

Building a Chaotic Proven Neural Network

International audienceChaotic neural networks have received a great deal of attention these last years. In this paper we establish a precise correspondence between the so-called chaotic iterations and a particular class of artificial neural networks: global recurrent multi-layer perceptrons. We show formally that it is possible to make these iterations behave chaotically, as defined by Devaney, and thus we obtain the first neural networks proven chaotic. Several neural networks with different architectures are trained to exhibit a chaotical behavior

On the Collision Property of Chaotic Iterations Based Post-Treatments over Cryptographic Pseudorandom Number Generator

International audienceThere is not a proper mathematical definition of chaos, we have instead a quite big amount of definitions, each of one describes chaos in a more or less general context. Taking in account this, it is clear why it is hard to design an algorithm that produce random numbers, a kind of algorithm that could have plenty of concrete appliceautifat (anul)d bions. However we must use a finite state machine (e.g. a laptop) to produce such a sequence of random numbers, thus it is convenient, for obvious reasons, to redefine those aimed sequences as pseudorandom; also problems arise with floating point arithmetic if one wants to recover some real chaotic property (i.e. properties from functions defined on the real numbers). All this considerations are synthesized in the problem of the Pseudorandom number generators (PRNGs). A solution to these obstacles may be to post-operate on existing PRNGs to improve their performances, using the so-called chaotic iterations, i.e., specific iterations of a boolean function and a shift operator that use the inputted generator. This approach leads to a mathematical description of such PRNGs as discrete dynamical systems, on which chaos properties can be investigated using mathematical topology and measure theory. Such properties are well-formulated, and they allow us to characterize which functions improves the sensitivity to the seed, the expansivity, the ergodicity, or the topological mixing of the generator resulting from such a post-processing. Experience shows that choosing relevant boolean functions in these chaotic iterations improves the randomness of the inputted generator, for instance when considering the number of statistical tests of randomness passed successfully. If we focus on the cryptographical application of PRNGs, there are two main classical notions to be considered, namely collision and avalanche effect. In this article, we recall the chaotic properties of the proposed post-treatment and we study the collision property in families of pseudorandom sequences produced by this process

Design of Discrete-time Chaos-Based Systems for Hardware Security Applications

Security of systems has become a major concern with the advent of technology. Researchers are proposing new security solutions every day in order to meet the area, power and performance specifications of the systems. The additional circuit required for security purposes can consume significant area and power. This work proposes a solution which utilizes discrete-time chaos-based logic gates to build a system which addresses multiple hardware security issues. The nonlinear dynamics of chaotic maps is leveraged to build a system that mitigates IC counterfeiting, IP piracy, overbuilding, disables hardware Trojan insertion and enables authentication of connecting devices (such as IoT and mobile). Chaos-based systems are also used to generate pseudo-random numbers for cryptographic applications.The chaotic map is the building block for the design of discrete-time chaos-based oscillator. The analog output of the oscillator is converted to digital value using a comparator in order to build logic gates. The logic gate is reconfigurable since different parameters in the circuit topology can be altered to implement multiple Boolean functions using the same system. The tuning parameters are control input, bifurcation parameter, iteration number and threshold voltage of the comparator. The proposed system is a hybrid between standard CMOS logic gates and reconfigurable chaos-based logic gates where original gates are replaced by chaos-based gates. The system works in two modes: logic locking and authentication. In logic locking mode, the goal is to ensure that the system achieves logic obfuscation in order to mitigate IC counterfeiting. The secret key for logic locking is made up of the tuning parameters of the chaotic oscillator. Each gate has 10-bit key which ensures that the key space is large which exponentially increases the computational complexity of any attack. In authentication mode, the aim of the system is to provide authentication of devices so that adversaries cannot connect to devices to learn confidential information. Chaos-based computing system is susceptible to process variation which can be leveraged to build a chaos-based PUF. The proposed system demonstrates near ideal PUF characteristics which means systems with large number of primary outputs can be used for authenticating devices