Improving usability of FPGA-based reconfigurable computers through operating system support

Advances in FPGA-based reconfigurable computers have made them a viable computing platform for a vast variety of computation demanding areas such as bioinformatics, speech recognition, and high-end digital signal processing. The lack of common, intuitive operating system support, however, hinders their wide deployment. This paper presents BORPH, an operating system framework for FPGA-based reconfigurable computers with a goal to ease and accelerate development of high-level applications to run on these computers. It provides kernel support for FPGA resources by extending a standard Linux operating system. Users therefore compile and execute hardware processes on FPGA resources the same way they run software processes on conventional processor-based systems. The operating system offers run-time general file system support to hardware processes as if they were software. Furthermore, a virtual file system is built to allow access to memories and registers defined in the FPGA, which provides communication links with running hardware processes. Increased productivities have been observed for high-level application developers, who have few previous experiences in hardware design, to implement complex mixed software/ hardware designs on a FPGA-based reconfigurable computer running BORPH. © 2006 IEEE.link_to_subscribed_fulltex

IMPROVING USABILITY OF FPGA-BASED RECONFIGURABLE COMPUTERS THROUGH OPERATING SYSTEM SUPPORT

Advances in FPGA-based reconfigurable computers have made them a viable computing platform for a vast variety of computation demanding areas such as bioinformatics, speech recognition, and high-end digital signal processing. The lack of common, intuitive operating system support, however, hinders their wide deployment. This paper presents BORPH, an operating system framework for FPGA-based reconfigurable computers with a goal to ease and accelerate development of high-level applications to run on these computers. It provides kernel support for FPGA resources by extending a standard Linux operating system. Users therefore compile and execute hardware processes on FPGA resources the same way they run software processes on conventional processor-based systems. The operating system offers run-time general file system support to hardware processes as if they were software. Furthermore, a virtual file system is built to allow access to memories and registers defined in the FPGA, which provides communication links with running hardware processes. Increased productivities have been observed for high-level application developers, who have few previous experiences in hardware design, to implement complex mixed software/ hardware designs on a FPGA-based reconfigurable computer running BORPH. 1

Методи та засоби підвищення ефективності обробки інформації в реконфігуровних комп’ютерних системах на базі ПЛІС

У дисертації наведено теоретичне узагальнення і нове вирішення наукової проблеми, що полягає в розвитку теорії організації обробки інформації в комп’ютерних системах на ПЛІС з урахуванням їх функціональних та апаратурних обмежень. Запропоновані методи та засоби включають в себе взаємозв’язані вирішення завдань оптимізації процесу обробки інформації шляхом визначення оптимальної зернистості обчислень, а також зменшення накладних витрат процесу відображення задач на реконфігуровне обчислювальне середовище, що в цілому забезпечує підвищення ефективності обробки інформації в реконфігуровних обчислювальних системах на ПЛІС. Запропоновано нову стратегію взаємної адаптації розв’язуваних задач і обчислювального середовища на ПЛІС, що ґрунтується на варіюванні зернистістю обчислень під час розв’язання задач великої розмірності, та вдосконалено концепцію реалізації локальних розподілених засобів керування відображенням задач на реконфігуровне обчислювальне середовище, що підвищує ефективність врахування фізичних параметрів кристалів ПЛІС на всіх рівнях реалізації реконфігуровних комп’ютерних систем

Eğitim amaçlı yapılandırılabilir modüler donanım üzerine gömülü işletim sistemi tasarımı

06.03.2018 tarihli ve 30352 sayılı Resmi Gazetede yayımlanan “Yükseköğretim Kanunu İle Bazı Kanun Ve Kanun Hükmünde Kararnamelerde Değişiklik Yapılması Hakkında Kanun” ile 18.06.2018 tarihli “Lisansüstü Tezlerin Elektronik Ortamda Toplanması, Düzenlenmesi ve Erişime Açılmasına İlişkin Yönerge” gereğince tam metin erişime açılmıştır.Eski bir çin atasözünde “Dinlersem unuturum, görürsem hatırlarım, uygularsam anlarım” veciz ifadesinden de anlaşılacağı üzere, bir konu hakkında en ideal öğrenmenin, öğrenilen teorik bilgilerin uygulamaya geçirilmesinden geçmektedir. Elektronik Mühendisliği, Bilgisayar Mühendisliği ve buna benzer bilim dallarında önemli bir yer teşkil eden Bilgisayar Mimarisi ve Organizasyonu ile İşletim Sistemi derslerinde teorik olarak işlenen kavramların pratiğe dönüştürülmesi günümüz eğitim sisteminin problemleri arasında yer almaktadır. Gelişen teknoloji ile beraber bu derslerin uygulama ihtiyacını karşılamaya yönelik yazılımsal ve donanımsal temelli çözümler üretilmiştir. İşletim Sistemleri dersine yönelik yapılan eğitimsel çalışmalar Bilgisayar Mimarisi ve Organizasyonu dersine yönelik yapılan çalışmalar ile karşılaştırıldığında özgün sistem tasarlama motivasyonu açısından yetersiz olduğu görülmektedir. Bu çözüm adımlarına son yıllarda alanda programlanabilir kapı dizileri(FPGA- Field Programmable Gate Arrays) geliştirme ortamları kullanılarak yeni bir yaklaşım getirilmeye çalışılmıştır. Bu geliştirme ortamları kullanılarak geliştirilen eğitimsel çalışmalar simülasyon ortamındaki ideal şartların yerine gerçek dünya şartları altında gözlenebilen, çalıştırılabilen, elle tutulabilen yapıların ortaya çıkmasına neden olmuştur. Bu tez kapsamında yapılan ilk çalışma 2009 yılında tasarladığımız yazılımsal tabanlı bilgisayar mimarisine modüler özellik katılarak FPGA geliştirme ortamına aktarılmıştır. Modülerlik özelliği kullanıcılara sisteme müdahil olma avantajını getirerek özellikle Bilgisayar Mimarisi ve Organizasyonu dersine yönelik motivasyon artıcı bir etki getirmiştir. Başka bir deyişle kullanıcı sistemdeki bir bileşenin yerine kendi tasarımını ekleyerek sistemin işleyişinde herhangi bir olumsuzluğa neden olmaması kullanıcının bu derse karşı motivasyonunu artıran kullanıcı dostu bir özelliktir. Bu nedenle kullanıcı büyük bir sistemin karmaşası içinde kaybolmadan sistemdeki birimleri kullanıcı tabanlı tasarımlarla değiştirerek kendi bilgisayar mimarisini oluşturabilecektir. Ayrıca modüler özellikli donanımsal tabanlı bilgisayar mimarisi üzerine sıfırdan bir işletim sisteminin nasıl tasarlanacağı konusunda eğitimsel bir doküman hazırlanarak literatürde bu alanda bir kullanıcı rehberi olması hedeflenmiştir. Tasarlanan işletim sistemi bilgisayar mimarisinin sahip olduğu assembly dili ile yazılan özgün bir işletim sistemi olup eğitimsel amaçlı olarak literatürde kullanılmak üzere yer alacaktır.An old Chinese proverb says “I hear, and I forget; I see, and I remember; I do, and I understand”. As is understood from this expression, the most ideal learning about a topic is to put into practice the theoretical knowledge learned. Computer Organization and Operating Systems courses play a significant role in the Electronics Engineering, Computer Engineering and similar disciplines. To convert practice the concepts handled in these courses are among the problems of today’s education system. It has been produced hardware and software based solutions to eliminate the need for application in these courses using technology. The educational tools prepared for operating systems course is insufficient in terms of the motivation of original system design compared with computer organization and architecture course In addition to these solutions, it has been brought new approach using FPGA(Field Programmable Gate Array) development environments. The educational tools solution developed by using FPGA development environments brought about observable, executable and tangible structures under real world conditions instead of the ideal conditions in the simulation environment. The computer architecture developed using an emulator program that we designed in 2009 is embedded to the FPGA development board by including the modular approach in this thesis. The modular approach allowed the effect for enhancing motivation to users by bringing involving feature in especially computer architecture and organization course. In other words, it is user friendly that since the user defined design does not cause any negative effect at the process of system and to be able to integrate their designs instead of a component of the system. In this way, the user will obtain the own computer architecture by changing the related system’s components with the user defined designs without getting lost in the complexity. Also we have prepared a user guide how to design an operating system on hardware based computer architecture from scratch. The developed operating system is written using assembly language of our computer architecture named BZK.SAU and presented an educational tool to the literatur

An FPGA implementation of an investigative many-core processor, Fynbos : in support of a Fortran autoparallelising software pipeline

Includes bibliographical references.In light of the power, memory, ILP, and utilisation walls facing the computing industry, this work examines the hypothetical many-core approach to finding greater compute performance and efficiency. In order to achieve greater efficiency in an environment in which Moore’s law continues but TDP has been capped, a means of deriving performance from dark and dim silicon is needed. The many-core hypothesis is one approach to exploiting these available transistors efficiently. As understood in this work, it involves trading in hardware control complexity for hundreds to thousands of parallel simple processing elements, and operating at a clock speed sufficiently low as to allow the efficiency gains of near threshold voltage operation. Performance is there- fore dependant on exploiting a new degree of fine-grained parallelism such as is currently only found in GPGPUs, but in a manner that is not as restrictive in application domain range. While removing the complex control hardware of traditional CPUs provides space for more arithmetic hardware, a basic level of control is still required. For a number of reasons this work chooses to replace this control largely with static scheduling. This pushes the burden of control primarily to the software and specifically the compiler, rather not to the programmer or to an application specific means of control simplification. An existing legacy tool chain capable of autoparallelising sequential Fortran code to the degree of parallelism necessary for many-core exists. This work implements a many-core architecture to match it. Prototyping the design on an FPGA, it is possible to examine the real world performance of the compiler-architecture system to a greater degree than simulation only would allow. Comparing theoretical peak performance and real performance in a case study application, the system is found to be more efficient than any other reviewed, but to also significantly under perform relative to current competing architectures. This failing is apportioned to taking the need for simple hardware too far, and an inability to implement static scheduling mitigating tactics due to lack of support for such in the compiler