Parallel Pipelines for DNA Sequence Alignment on a Cluster of Multicores: A Comparison of Communication Models

HPC (high perfomance computing) based on clusters of multicores is one of the main research lines in parallel programming. It is important to study the impact of programming paradigms of shared memory, message passing or a combination of both on these architectures in order to efficiently exploit the power of these architectures. The Smith-Waterman algorithm is used as study case for the local alignment of DNA sequences, which allows establishing the similarity degree between two sequences. In this paper, the Smith-Waterman algorithm is parallelized by means of a pipeline scheme due to the data dependencies that are inherent to the problem, using the various communication/synchronization models mentioned above and then carrying out a comparative analysis. Finally, experimental results are presented, as well as future research lines.Facultad de Informátic

Parallel Pipelines for DNA Sequence Alignment on a Cluster of Multicores: A Comparison of Communication Models

HPC (high perfomance computing) based on clusters of multicores is one of the main research lines in parallel programming. It is important to study the impact of programming paradigms of shared memory, message passing or a combination of both on these architectures in order to efficiently exploit the power of these architectures. The Smith-Waterman algorithm is used as study case for the local alignment of DNA sequences, which allows establishing the similarity degree between two sequences. In this paper, the Smith-Waterman algorithm is parallelized by means of a pipeline scheme due to the data dependencies that are inherent to the problem, using the various communication/synchronization models mentioned above and then carrying out a comparative analysis. Finally, experimental results are presented, as well as future research lines.Facultad de Informátic

Power Characterisation of Shared-Memory HPC Systems

Energy consumption has become one of the greatest challenges in the field of High Performance Computing (HPC). Besides its impact on the environment, energy is a limiting factor for the HPC. Keeping the power consumption of a system below a threshold is one of the great problems; and power prediction can help to solve it. The power characterisation can be used to know the power behaviour of the system under study, and to be a support to reach the power prediction. Furthermore, it could be used to design power-aware application programs. In this article we propose a methodology to characterise the power consumption of shared-memory HPC systems. Our proposed methodology involves the finding of influence factors on power consumed by the systems. It is similar to previous works, but we propose an in-deep approach that can help us to get a better power characterisation of the system. We apply our methodology to characterise an Intel server platform and the results show that we can find a more extended set of influence factors on power consumption.Red de Universidades con Carreras en Informática (RedUNCI

Power Characterisation of Shared-Memory HPC Systems

Energy consumption has become one of the greatest challenges in the field of High Performance Computing (HPC). Besides its impact on the environment, energy is a limiting factor for the HPC. Keeping the power consumption of a system below a threshold is one of the great problems; and power prediction can help to solve it. The power characterisation can be used to know the power behaviour of the system under study, and to be a support to reach the power prediction. Furthermore, it could be used to design power-aware application programs. In this article we propose a methodology to characterise the power consumption of shared-memory HPC systems. Our proposed methodology involves the finding of influence factors on power consumed by the systems. It is similar to previous works, but we propose an in-deep approach that can help us to get a better power characterisation of the system. We apply our methodology to characterise an Intel server platform and the results show that we can find a more extended set of influence factors on power consumption.Red de Universidades con Carreras en Informática (RedUNCI

Parallel Pipelines for DNA Sequence Alignment on a Cluster of Multicores: A Comparison of Communication Models

HPC (high perfomance computing) based on clusters of multicores is one of the main research lines in parallel programming. It is important to study the impact of programming paradigms of shared memory, message passing or a combination of both on these architectures in order to efficiently exploit the power of these architectures. The Smith-Waterman algorithm is used as study case for the local alignment of DNA sequences, which allows establishing the similarity degree between two sequences. In this paper, the Smith-Waterman algorithm is parallelized by means of a pipeline scheme due to the data dependencies that are inherent to the problem, using the various communication/synchronization models mentioned above and then carrying out a comparative analysis. Finally, experimental results are presented, as well as future research lines.Facultad de Informátic

Mejora de la eficiencia energética en sistemas de computación de altas prestaciones

En la actualidad, los sistemas de cómputo paralelo de altas prestaciones ofrecen un gran rendimiento, impensado hasta hace pocos años, pero que consumen enormes cantidades de energía eléctrica. La tecnolog ía de escalado dinámico de tensión (DVS, Dynamic Voltage Scaling) permite reducir el consumo energético mediante cambios dinámicos de la frecuencia de reloj de las CPUs. Las frecuencias más bajas requieren menos potencia, que lleva a una reducción del calor generado, e indirectamente a un aumento del tiempo medio entre fallos de los componentes del sistema de cómputo, menos energía necesaria para la refrigeración, y la posibilidad de aumentar la densidad de componentes. Normalmente, los algoritmos DVS para sistemas de altas prestaciones buscan reducir el consumo energético prácticamente sin reducir el rendimiento. Sin embargo, muchas veces es deseable llevar el consumo energético a niveles inferiores aunque se pierda rendimiento. En este artículo, se exponen las ideas para desarrollar un nuevo algoritmo DVS, capaz de mejorar la e ciencia energética y el rendimiento (velocidad) resultante de una ejecución a la menor frecuencia disponible de las CPUs. Los resultados experimentales muestran que, para cierto tipo de aplicaciones, es posible reducir el consumo energético como así también aumentar el rendimiento en comparación a una ejecución a la menor frecuencia de las CPUs.Eje: Workshop Procesamiento distribuido y paralelo (WPDP)Red de Universidades con Carreras en Informática (RedUNCI

Power Characterisation of Shared-Memory HPC Systems

Energy consumption has become one of the greatest challenges in the field of High Performance Computing (HPC). Besides its impact on the environment, energy is a limiting factor for the HPC. Keeping the power consumption of a system below a threshold is one of the great problems; and power prediction can help to solve it. The power characterisation can be used to know the power behaviour of the system under study, and to be a support to reach the power prediction. Furthermore, it could be used to design power-aware application programs. In this article we propose a methodology to characterise the power consumption of shared-memory HPC systems. Our proposed methodology involves the finding of influence factors on power consumed by the systems. It is similar to previous works, but we propose an in-deep approach that can help us to get a better power characterisation of the system. We apply our methodology to characterise an Intel server platform and the results show that we can find a more extended set of influence factors on power consumption.Red de Universidades con Carreras en Informática (RedUNCI

Computer Science & Technology Series : XVIII Argentine Congress of Computer Science. Selected papers

CACIC’12 was the eighteenth Congress in the CACIC series. It was organized by the School of Computer Science and Engineering at the Universidad Nacional del Sur. The Congress included 13 Workshops with 178 accepted papers, 5 Conferences, 2 invited tutorials, different meetings related with Computer Science Education (Professors, PhD students, Curricula) and an International School with 5 courses. CACIC 2012 was organized following the traditional Congress format, with 13 Workshops covering a diversity of dimensions of Computer Science Research. Each topic was supervised by a committee of 3-5 chairs of different Universities. The call for papers attracted a total of 302 submissions. An average of 2.5 review reports were collected for each paper, for a grand total of 752 review reports that involved about 410 different reviewers. A total of 178 full papers, involving 496 authors and 83 Universities, were accepted and 27 of them were selected for this book.Red de Universidades con Carreras en Informática (RedUNCI