Energy autonomous systems : future trends in devices, technology, and systems

The rapid evolution of electronic devices since the beginning of the nanoelectronics era has brought about exceptional computational power in an ever shrinking system footprint. This has enabled among others the wealth of nomadic battery powered wireless systems (smart phones, mp3 players, GPS, …) that society currently enjoys. Emerging integration technologies enabling even smaller volumes and the associated increased functional density may bring about a new revolution in systems targeting wearable healthcare, wellness, lifestyle and industrial monitoring applications

Variable length pattern coding for power reduction in off-chip data buses

Off-chip buses consume a huge fraction (20%-40%) of the system power. Hence, techniques such as increasing bus widths, transition encoding etc. have been used for power reduction on off-chip data buses. Since capacitances at the I/O pads and interwire capacitances contribute significantly to increase in power, encoding/decoding schemes have been developed to reduce switching activity of the off-chip bus lines, thus reducing power. Frequent-Value Encoding(FVE) [1], Frequent Value Encoding with Xor (FVExor) [1] and VALVE [2] are some of the better known encoding schemes but they still have scope for improvement. This thesis addresses the problem of power reduction in off-chip data buses by encoding variable number (1 to 4) of fixed-size (32-bit) data values (variable length patterns) which exhibit temporal locality. This characteristic enables us to cache these patterns using 64-entry CAM at the encoder and 64-entry SRAM at the decoder. Whenever a pattern match occurs a 2-bit code indicating the index of the match is sent. If a variable length pattern match occurs then the code and unmatched portion of data is sent. We implemented our scheme, Variable Length Pattern Coding (VLPC) for various integer and floating point benchmarks and have seen 6% to 49% encodable patterns in these benchmarks. Based on the experiments on simplescalar and our analysis in MATLAB, we obtained 4.88% to 40.11% reduction in transition activity for SPEC2000 benchmarks such as crafty, swim, mcf, applu, ammp etc. over unencoded data. This is 0.3% to 38.9% higher than that obtained using FVE, FVExor [1] and VALVE [2] encoding schemes. Finally, we have designed a low-power custom CAM and SRAM using 45nm BSIM4 technology models which has been used to verify lower latency of data matching and storing

In-Network Distributed Solar Current Prediction

Long-term sensor network deployments demand careful power management. While managing power requires understanding the amount of energy harvestable from the local environment, current solar prediction methods rely only on recent local history, which makes them susceptible to high variability. In this paper, we present a model and algorithms for distributed solar current prediction, based on multiple linear regression to predict future solar current based on local, in-situ climatic and solar measurements. These algorithms leverage spatial information from neighbors and adapt to the changing local conditions not captured by global climatic information. We implement these algorithms on our Fleck platform and run a 7-week-long experiment validating our work. In analyzing our results from this experiment, we determined that computing our model requires an increased energy expenditure of 4.5mJ over simpler models (on the order of 10^{-7}% of the harvested energy) to gain a prediction improvement of 39.7%.Comment: 28 pages, accepted at TOSN and awaiting publicatio

A Survey of Green Networking Research

Reduction of unnecessary energy consumption is becoming a major concern in wired networking, because of the potential economical benefits and of its expected environmental impact. These issues, usually referred to as "green networking", relate to embedding energy-awareness in the design, in the devices and in the protocols of networks. In this work, we first formulate a more precise definition of the "green" attribute. We furthermore identify a few paradigms that are the key enablers of energy-aware networking research. We then overview the current state of the art and provide a taxonomy of the relevant work, with a special focus on wired networking. At a high level, we identify four branches of green networking research that stem from different observations on the root causes of energy waste, namely (i) Adaptive Link Rate, (ii) Interface proxying, (iii) Energy-aware infrastructures and (iv) Energy-aware applications. In this work, we do not only explore specific proposals pertaining to each of the above branches, but also offer a perspective for research.Comment: Index Terms: Green Networking; Wired Networks; Adaptive Link Rate; Interface Proxying; Energy-aware Infrastructures; Energy-aware Applications. 18 pages, 6 figures, 2 table

SIVEH: numerical computing simulation of wireless energy-harvesting sensor nodes

[EN] The paper presents a numerical energy harvesting model for sensor nodes, SIVEH (Simulator I–V for EH), based on I–V hardware tracking. I–V tracking is demonstrated to be more accurate than traditional energy modeling techniques when some of the components present different power dissipation at either different operating voltages or drawn currents. SIVEH numerical computing allows fast simulation of long periods of time—days, weeks, months or years—using real solar radiation curves. Moreover, SIVEH modeling has been enhanced with sleep time rate dynamic adjustment, while seeking energy-neutral operation. This paper presents the model description, a functional verification and a critical comparison with the classic energy approachThe authors gratefully acknowledge financial support from CICYT. ANDREA: Automated Inspection and Remote Performance of Marine Fish Farms (CTM2011-29691-C02-01); and RIDeWAM: Research on Improvement of the Dependability of WSN-based Applications by Developing a Hybrid Monitoring Platform. (TIN2011-28435-C03-01).Sánchez Matías, AM.; Blanc Clavero, S.; Climent, S.; Yuste Pérez, P.; Ors Carot, R. (2013). SIVEH: numerical computing simulation of wireless energy-harvesting sensor nodes. Sensors. 13(9):11750-11771. https://doi.org/10.3390/s130911750S1175011771139Akyildiz, I., Melodia, T., & Chowdury, K. (2007). Wireless multimedia sensor networks: A survey. IEEE Wireless Communications, 14(6), 32-39. doi:10.1109/mwc.2007.4407225Madan, R., Cui, S., Lall, S., & Goldsmith, A. (2006). Cross-Layer Design for Lifetime Maximization in Interference-Limited Wireless Sensor Networks. IEEE Transactions on Wireless Communications, 5(11), 3142-3152. doi:10.1109/twc.2006.04770Wang, Z. L., & Wu, W. (2012). Nanotechnology-Enabled Energy Harvesting for Self-Powered Micro-/Nanosystems. Angewandte Chemie International Edition, 51(47), 11700-11721. doi:10.1002/anie.201201656Riemer, R., & Shapiro, A. (2011). Biomechanical energy harvesting from human motion: theory, state of the art, design guidelines, and future directions. Journal of NeuroEngineering and Rehabilitation, 8(1), 22. doi:10.1186/1743-0003-8-22Sudevalayam, S., & Kulkarni, P. (2011). Energy Harvesting Sensor Nodes: Survey and Implications. IEEE Communications Surveys & Tutorials, 13(3), 443-461. doi:10.1109/surv.2011.060710.00094Alippi, C., & Galperti, C. (2008). An Adaptive System for Optimal Solar Energy Harvesting in Wireless Sensor Network Nodes. IEEE Transactions on Circuits and Systems I: Regular Papers, 55(6), 1742-1750. doi:10.1109/tcsi.2008.922023Alippi, C., Camplani, R., Galperti, C., & Roveri, M. (2011). A Robust, Adaptive, Solar-Powered WSN Framework for Aquatic Environmental Monitoring. IEEE Sensors Journal, 11(1), 45-55. doi:10.1109/jsen.2010.2051539Lopez-Lapena, O., Penella, M. T., & Gasulla, M. (2010). A New MPPT Method for Low-Power Solar Energy Harvesting. IEEE Transactions on Industrial Electronics, 57(9), 3129-3138. doi:10.1109/tie.2009.2037653Kansal, A., Hsu, J., Zahedi, S., & Srivastava, M. B. (2007). Power management in energy harvesting sensor networks. ACM Transactions on Embedded Computing Systems, 6(4), 32-es. doi:10.1145/1274858.1274870Niyato, D., Hossain, E., Rashid, M., & Bhargava, V. (2007). Wireless sensor networks with energy harvesting technologies: a game-theoretic approach to optimal energy management. IEEE Wireless Communications, 14(4), 90-96. doi:10.1109/mwc.2007.4300988EECS Department of the University of California at Berkleyhttp://bwrc.eecs.berkeley.edu/Classes/IcBook/SPICE/http://www.panasonic.com/industrial/components/pdf/goldcap_tech-guide_052505.pdfAnalog, Embedded Processing, Semiconductor Company, Texas Instrumentshttp://www.ti.comST Microelectronicshttp://www.st.comHome Pagehttp://www.linear.com/ns-3http://www.nsnam.orgSánchez, A., Blanc, S., Yuste, P., Perles, A., & Serrano, J. J. (2012). An Ultra-Low Power and Flexible Acoustic Modem Design to Develop Energy-Efficient Underwater Sensor Networks. Sensors, 12(6), 6837-6856. doi:10.3390/s12060683

HOLLOWS: A Power-Aware Task Scheduler for Energy Harvesting Sensor Nodes

Energy-harvesting sensor nodes (EHSNs) have stringent low-energy consumption requirements, but they need to concurrently execute several types of tasks (processing, sensing, actuation, etc). Furthermore, no accurate models exist to predict the energy harvesting income in order to adapt at run-time the executing set of prioritized tasks. In this paper, we propose a novel power-aware task scheduler for EHSNs, namely, HOLLOWS: Head-of-Line Low-Overhead Wide-priority Service. HOLLOWS uses an energy-constrained prioritized queue model to describe the residence time of tasks entering the system and dynamically selects the set of tasks to execute, according to system accuracy requirements and expected energy. Moreover, HOLLOWS includes a new energy harvesting prediction algorithm, i.e., Weather-Conditioned Moving Average (WCMA), which we have developed to estimate the solar panel energy income. We have tested HOLLOWS using the real-life working conditions of Shimmer, a sensor node for structural health monitoring. Our results indicate that HOLLOWS accurately predicts the energy available in Shimmer to guarantee a certain damage monitoring quality for long-term autonomous scenarios. Also, HOLLOWS is able to adjust the use of the incoming energy harvesting to achieve high accuracy for rapid event damage assessment (after earthquakes, fires, etc.)

Urubu: energy scavenging in wireless sensor networks

For the past years wireless sensor networks (WSNs) have been coined as one of the most promising technologies for supporting a wide range of applications. However, outside the research community, few are the people who know what they are and what they can offer. Even fewer are the ones that have seen these networks used in real world applications. The main obstacle for the proliferation of these networks is energy, or the lack of it. Even though renewable energy sources are always present in the networks environment, designing devices that can efficiently scavenge that energy in order to sustain the operation of these networks is still an open challenge. Energy scavenging, along with energy efficiency and energy conservation, are the current available means to sustain the operation of these networks, and can all be framed within the broader concept of “Energetic Sustainability”. A comprehensive study of the several issues related to the energetic sustainability of WSNs is presented in this thesis, with a special focus in today’s applicable energy harvesting techniques and devices, and in the energy consumption of commercially available WSN hardware platforms. This work allows the understanding of the different energy concepts involving WSNs and the evaluation of the presented energy harvesting techniques for sustaining wireless sensor nodes. This survey is supported by a novel experimental analysis of the energy consumption of the most widespread commercially available WSN hardware platforms.Há já alguns anos que as redes de sensores sem fios (do Inglês Wireless Sensor Networks - WSNs) têm sido apontadas como uma das mais promissoras tecnologias de suporte a uma vasta gama de aplicações. No entanto, fora da comunidade científica, poucas são as pessoas que sabem o que elas são e o que têm para oferecer. Ainda menos são aquelas que já viram a sua utilização em aplicações do dia-a-dia. O principal obstáculo para a proliferação destas redes é a energia, ou a falta dela. Apesar da existência de fontes de energia renováveis no local de operação destas redes, continua a ser um desafio construir dispositivos capazes de aproveitar eficientemente essa energia para suportar a operação permanente das mesmas. A colheita de energia juntamente com a eficiência energética e a conservação de energia, são os meios disponíveis actualmente que permitem a operação permanente destas redes e podem ser todos englobados no conceito mais amplo de “Sustentabilidade Energética”. Esta tese apresenta um estudo extensivo das várias questões relacionadas com a sustentabilidade energética das redes de sensores sem fios, com especial foco nas tecnologias e dispositivos explorados actualmente na colheita de energia e no consumo energético de algumas plataformas comercias de redes de sensores sem fios. Este trabalho permite compreender os diferentes conceitos energéticos relacionados com as redes de sensores sem fios e avaliar a capacidade das tecnologias apresentadas em suportar a operação permanente das redes sem fios. Este estudo é suportado por uma inovadora análise experimental do consumo energético de algumas das mais difundidas plataformas comerciais de redes de sensores sem fios

Driving the Network-on-Chip Revolution to Remove the Interconnect Bottleneck in Nanoscale Multi-Processor Systems-on-Chip

The sustained demand for faster, more powerful chips has been met by the availability of chip manufacturing processes allowing for the integration of increasing numbers of computation units onto a single die. The resulting outcome, especially in the embedded domain, has often been called SYSTEM-ON-CHIP (SoC) or MULTI-PROCESSOR SYSTEM-ON-CHIP (MP-SoC). MPSoC design brings to the foreground a large number of challenges, one of the most prominent of which is the design of the chip interconnection. With a number of on-chip blocks presently ranging in the tens, and quickly approaching the hundreds, the novel issue of how to best provide on-chip communication resources is clearly felt. NETWORKS-ON-CHIPS (NoCs) are the most comprehensive and scalable answer to this design concern. By bringing large-scale networking concepts to the on-chip domain, they guarantee a structured answer to present and future communication requirements. The point-to-point connection and packet switching paradigms they involve are also of great help in minimizing wiring overhead and physical routing issues. However, as with any technology of recent inception, NoC design is still an evolving discipline. Several main areas of interest require deep investigation for NoCs to become viable solutions: • The design of the NoC architecture needs to strike the best tradeoff among performance, features and the tight area and power constraints of the onchip domain. • Simulation and verification infrastructure must be put in place to explore, validate and optimize the NoC performance. • NoCs offer a huge design space, thanks to their extreme customizability in terms of topology and architectural parameters. Design tools are needed to prune this space and pick the best solutions. • Even more so given their global, distributed nature, it is essential to evaluate the physical implementation of NoCs to evaluate their suitability for next-generation designs and their area and power costs. This dissertation performs a design space exploration of network-on-chip architectures, in order to point-out the trade-offs associated with the design of each individual network building blocks and with the design of network topology overall. The design space exploration is preceded by a comparative analysis of state-of-the-art interconnect fabrics with themselves and with early networkon- chip prototypes. The ultimate objective is to point out the key advantages that NoC realizations provide with respect to state-of-the-art communication infrastructures and to point out the challenges that lie ahead in order to make this new interconnect technology come true. Among these latter, technologyrelated challenges are emerging that call for dedicated design techniques at all levels of the design hierarchy. In particular, leakage power dissipation, containment of process variations and of their effects. The achievement of the above objectives was enabled by means of a NoC simulation environment for cycleaccurate modelling and simulation and by means of a back-end facility for the study of NoC physical implementation effects. Overall, all the results provided by this work have been validated on actual silicon layout

DISK DESIGN-SPACE EXPLORATION IN TERMS OF SYSTEM-LEVEL PERFORMANCE, POWER, AND ENERGY CONSUMPTION

To make the common case fast, most studies focus on the computation phase of applications in which most instructions are executed. However, many programs spend significant time in the I/O intensive phase due to the I/O latency. To obtain a system with more balanced phases, we require greater insight into the effects of the I/O configurations to the entire system in both performance and power dissipation domains. Due to lack of public tools with the complete picture of the entire memory hierarchy, we developed SYSim. SYSim is a complete-system simulator aiming at complete memory hierarchy studies in both performance and power consumption domains. In this dissertation, we used SYSim to investigate the system-level impacts of several disk enhancements and technology improvements to the detailed interaction in memory hierarchy during the I/O-intensive phase. The experimental results are reported in terms of both total system performance and power/energy consumption. With SYSim, we conducted the complete-system experiments and revealed intriguing behaviors including, but not limited to, the following: During the I/O intensive phase which consists of both disk reads and writes, the average system CPI tracks only average disk read response time, and not overall average disk response time, which is the widely-accepted metric in disk drive research. In disk read-dominating applications, Disk Prefetching is more important than increasing the disk RPM. On the other hand, in applications with both disk reads and writes, the disk RPM matters. The execution time can be improved to an order of magnitude by applying some disk enhancements. Using disk caching and prefetching can improve the performance by the factor of 2, and write-buffering can improve the performance by the factor of 10. Moreover, using disk caching/prefetching and the write-buffering techniques in conjunction can improve the total system performance by at least an order of magnitude. Increasing the disk RPM and the number of disks in RAID disk system also have an impressive improvement over the total system performance. However, employing such techniques requires careful consideration for trade-offs in power/energy consumption