Transistor teaching back to Transfer-Resistor : A summary table of definitions and students’ perceptions

The Bipolar Junction Transistor (BJT) study is a regular subject on analog electronic subjects taught in the initial phase of electronic engineering courses. This electronic component, often considered elementary, is far from being simple to explain because it covers several concepts, such as three Regions of Operation, two Working Regimes, and two Region of Operation Boundaries. It is not surprising then that students often find it difficult to understand the functioning of this component. The present article describes partially the work developed by a team with a number of students in order to understand the difficulties of teaching/learning the BJT. We present the students’ perceptions from the analysis of several traditional and modern means to support the learning of the BJT. Interestingly, the learning BJT model considered simpler for beginner students corresponds to the model that originally gave it the name i.e. Trans-Resistor (Transistor).info:eu-repo/semantics/publishedVersio

Runtime Hardware Reconfiguration in Wireless Sensor Networks for Condition Monitoring

The integration of miniaturized heterogeneous electronic components has enabled the deployment of tiny sensing platforms empowered by wireless connectivity known as wireless sensor networks. Thanks to an optimized duty-cycled activity, the energy consumption of these battery-powered devices can be reduced to a level where several years of operation is possible. However, the processing capability of currently available wireless sensor nodes does not scale well with the observation of phenomena requiring a high sampling resolution. The large amount of data generated by the sensors cannot be handled efficiently by low-power wireless communication protocols without a preliminary filtering of the information relevant for the application. For this purpose, energy-efficient, flexible, fast and accurate processing units are required to extract important features from the sensor data and relieve the operating system from computationally demanding tasks. Reconfigurable hardware is identified as a suitable technology to fulfill these requirements, balancing implementation flexibility with performance and energy-efficiency. While both static and dynamic power consumption of field programmable gate arrays has often been pointed out as prohibitive for very-low-power applications, recent programmable logic chips based on non-volatile memory appear as a potential solution overcoming this constraint. This thesis first verifies this assumption with the help of a modular sensor node built around a field programmable gate array based on Flash technology. Short and autonomous duty-cycled operation combined with hardware acceleration efficiently drop the energy consumption of the device in the considered context. However, Flash-based devices suffer from restrictions such as long configuration times and limited resources, which reduce their suitability for complex processing tasks. A template of a dynamically reconfigurable architecture built around coarse-grained reconfigurable function units is proposed in a second part of this work to overcome these issues. The module is conceived as an overlay of the sensor node FPGA increasing the implementation flexibility and introducing a standardized programming model. Mechanisms for virtual reconfiguration tailored for resource-constrained systems are introduced to minimize the overhead induced by this genericity. The definition of this template architecture leaves room for design space exploration and application- specific customization. Nevertheless, this aspect must be supported by appropriate design tools which facilitate and automate the generation of low-level design files. For this purpose, a software tool is introduced to graphically configure the architecture and operation of the hardware accelerator. A middleware service is further integrated into the wireless sensor network operating system to bridge the gap between the hardware and the design tools, enabling remote reprogramming and scheduling of the hardware functionality at runtime. At last, this hardware and software toolchain is applied to real-world wireless sensor network deployments in the domain of condition monitoring. This category of applications often require the complex analysis of signals in the considered range of sampling frequencies such as vibrations or electrical currents, making the proposed system ideally suited for the implementation. The flexibility of the approach is demonstrated by taking examples with heterogeneous algorithmic specifications. Different data processing tasks executed by the sensor node hardware accelerator are modified at runtime according to application requests

How to Use Remote Labs for Enhancing E-Learning on PSoCs

Electronic teaching is a task that intents to also prepare the student to understand and design analog and digital circuits. However the design flow in those two arenas are quite opposite as result of very different development state and also are the design methodologies, being challenging for both teachers and students. In fact, the electronic design in the digital field is centered in the use of components based in two kind of circuits (microprocessor and FPGA) using a relatively high level programing/configuring languages. In an opposite way, the analog design is traditionally founded in the use of elementary components (e.g. resistors and capacitors) associated with macroblocks (e.g. operational amplifiers) in order to built-up the wanted mission circuit. However they have just a few analog programmable components, as the PSoC that is analogically configurable in a similar manner that the one already used in the digital domain. The use of this kind of components, however, is not straightforward being necessary to get some concepts traditionally not taught in the analog electronic classes. The training using PSoC are then indispensable to verify if the programed analog circuit corresponds to the intended one. The current work present an innovative remote lab to support teaching of the PSoC