A Model of Computation for Reconfigurable Systems

The dissertation introduces RecDEVS, a model of computation for reconfigurable hardware systems. Existing computational models for conventional hardware structures are not suited very well to model the dynamic behavior of reconfigurable systems. This work first systematically investigates the requirements that are necessary to properly model reconfigurable systems. Then, the Discrete Event System Specification (DEVS) formalism is extended into RecDEVS, a formalism capable of modeling reconfigurable systems. It is then demonstrated how RecDEVS can be utilized to do a a model based design flow that eases system verification

HIGH-LEVEL SPECIFICATION OF RUNTIME RECONFIGURABLE DESIGNS

”C to Gates ” compilers for FPGAs have been a topic of investigation for nearly two decades. Some of these endeavors have reached a point of viability. Impulse C, for example, enables an application developer to describe hardware using a large subset of standard C. While the Impulse C simulation and implementation tools provide an excellent high-level development environment for FPGA applications, no provisions exist for describing dynamic hardware. Through the addition of new functions and slight modifications to the behavior of the existing tools, the Impulse C language becomes a powerful development framework for dynamic reconfiguration of FPGA hardware. This modified language will constitute the input to an automated implementation flow