Petri net model decomposition - a model based approach supporting distributed execution

Dissertação apresentada para obtenção do Grau de Doutor em Engenharia Electrotécnica, Especialidade de Sistemas Digitais, pela Universidade Nova de Lisboa, Faculdade de Ciências e TecnologiaModel-based systems development has contributed to reducing the enormous difference between the continuous increase of systems complexity and the improvement of methods and methodologies available to support systems development. The choice of the modeling formalism is an important factor for success-fully increasing productivity. Petri nets proved to be a suitable candidate for being chosen as a system specification language due to their natural support of modeling processes with concurrency, synchronization and resource sharing, as well as the mechanisms of composition and decomposition. Also having a formal representation reinforces the choice, given that the use of verification tools is fundamental for complex systems development. This work proposes a method for partitioning Petri net models into concurrent sub-models, supporting their distributed implementation. The IOPT class (Input-Output Place Transition) is used as a reference class. It is extended by directed synchronous communication channels, enabling the com- munication between the generated sub-models. Three rules are proposed to perform the partition, and restrictions of the proposed partition method are identified. It is possible to directly compose models which result from the partitioning operation, through an operation of model addition. This allows the re-use of previously obtained models, as well as the easy modification of the intended system functionalities. The algorithms associated with the implementation of the partition operation are presented, as well as its rules and other procedures. The proposed methods are validated through several case studies emphasizing control components of automation systems

NOVA-HDL-Assist: Edição e Configuração de Código VHDL

As FPGA (Field Programmable Gate Array) e as linguagens de descrição de hardware, como VHDL (VHSIC-HDL, Very High Speed Integrated Circuit Hardware Description Language), têm uma grande importância no mundo tecnológico e industrial. Contudo, as dificuldades inerentes a estas linguagens têm questionado a comunidade sobre quais as melhores formas de a promover e ensinar, e quais as melhores ferramentas a desenvolver para facilitar a implementação e ensino de circuitos em VHDL. Face às dificuldades de aprendizagem e uso de linguagens de descrição de hardware, como VHDL, este trabalho tem como objectivo o desenvolvimento de uma ferramenta que facilite a aprendizagem e a descrição de hardware através de VHDL. Para tal é proposta uma ferramenta Web, denominada NOVA-HDL-Assist, que permite a configuração de módulos e excertos de código VHDL. Esperando-se que o utilizador consiga aprender e implementar os seus projectos mais eficientemente, no menor tempo possível e com um menor número de erros de sintaxe. A ferramenta em questão está disponível em http://gres.uninova.pt/nova-hdl-assist/. O público-alvo desta ferramenta não são apenas alunos ou entusiastas de Engenharia Electrotécnica ou Electrónica que desejem ter um primeiro contacto com linguagens de descrição de Hardware, mas também técnicos e engenheiros de outras áreas que desejem realizar projectos em VHDL com autonomia própria, seja no âmbito profissional ou pessoal.FPGAs (Field Programmable Gate Array) and hardware description languages, such as VHDL (VHSIC-HDL, Very High Speed Integrated Circuit Hardware Description Language), are of great importance in the technological and industrial world. However, the difficulties inherent in this languages have questioned the community about the best ways to promote and teach it, and what are the best tools to develop, to facilitate the implementation and learning of circuits in VHDL. In view of the difficulties of using hardware description languages, such as VHDL, this work aims to develop a tool that facilitates the description of hardware through VHDL. For this purpose, a Web tool, called NOVA-HDL-Assist, is proposed, which allows the configuration of modules and VHDL code samples. It is hoped that the user can learn, implement their projects more efficiently, in the shortest possible time and with the fewest syntax errors. The tool is available at http://gres.uninova.pt/nova-hdl-assist/. The target audience of this tool will not only be students or enthusiasts of Electrotechnical or Electronic Engineering who wish to have a first contact with hardware description languages, but also technicians and engineers from other areas who wish to carry out projects in VHDL autonomously, whether in the professional or personal sphere