HADES-1: A rapid prototyping environment based on advanced FPGA’s

Rapid prototyping of large digital systems is becoming supported with the use of new advanced FPGA's. These FPGA's can give more Information than functional simulation and emulation tasks, due to their inner inspection features. This paper presents HADES-l, a new environment for rapid prototyping and hardware debugging. HADES-l is based on one FPGA of the VIRTEX family, exploiting the advanced features of the SelectMap port and a fast link with the host PC

Real-Time Scheduling for Software Prototyping

This paper presents several real-time scheduling algorithms developed to support rapid prototyping of embedded systems using the Computer Aided Prototyping System (CAPS). The CAPS tools are based on the Prototyping System Description Language (PSDL), which is a high-level language designed specifically to support the conceptual modeling of real-time embedded systems. This paper describes the scheduling algorithms used in CAPS along with the associated timing constraint and hardware models, which include single and multi-processor configurations

Rapid prototyping with Matlab/Simulink-- A case study.

In order to minimise development time it is important to be able to implement and test control functions at an early stage in a project, even before the electronic hardware of the new product is available. For this purpose, a PC based rapid prototyping system including a graphical modelling/simulation tool and automatic C code generation for real-time simulations with hardware in the loop may be used. In this thesis an evaluation of Matlab/Simulink as a tool for rapid prototyping of control functions in dialysis machines has been done. A comparison has also been done to the tool that is in use today at Gambro Lundia AB, MatrixX/SystemBuild. The sections that have been investigated are block diagram modelling including translation from SystemBuild block diagram, state machine implementation, Graphical User Interface, data acquisition, simulation with hardware-in-the-loop, and code generation. The Matlab/Simulink tool has been tested on a hydraulic system prototype during the evaluation and advantages and disadvantages have been noted. The report gives an overview of howMatlab/Simulink meets the requirements that can be expected of a rapid prototyping tool, for control functions and design tips to avoid problems during the development phase

Using Rapid Prototyping in Computer Architecture Design Laboratories

This paper describes the undergraduate computer architecture courses and laboratories introduced at Georgia Tech during the past two years. A core sequence of six required courses for computer engineering students has been developed. In this paper, emphasis is placed upon the new core laboratories which utilize commercial CAD tools, FPGAs, hardware emulators, and a VHDL based rapid prototyping approach to simulate, synthesize, and implement prototype computer hardware

Xilinx System Generator Based HW Components for Rapid Prototyping of Computer Vision SW/HW Systems

This paper shows how the Xilinx System Generator can be used to develop hardware-based computer vision algorithms from a system level approach without the necessity of in-depth knowing neither a hardware description language nor the particulars of the hardware platform. Also, it is demonstrated that Simulink can be employed as a co-design and co-simulation platform for rapid prototyping of Computer Vision HW/SW systems. To do this, a library of optimized image processing components based on XSG and Matlab has been developed and tested in hybrid schemes including HW and SW modules. As a part of the testing, results of the prototyping and co-simulation of a HW/SW Computer Vision System for the automated inspection of tangerine segments are presented.COSIVA (TIC 2000-1765-C03-02)Escuela Técnica Superior de Ingeniería Industria

Implementation of luo-rudi phase 1 cardiac cell excitation model in FPGA

Dynamic simulation of complex cardiac excitation and conduction requires high computational time. Thus, the hardware techniques that can run in the real-time simulation was introduced. However, previously developed hardware simulation requires high power consumption and has a large physical size. Due to the drawbacks, this research presents the adaptation of Luo-Rudy Phase I (LR-I) cardiac excitation model in a rapid prototyping method of field programmable gate array (FPGA) for real-time simulation, lower power consumption and minimizing the size. For the rapid prototyping, a nonlinear Ordinary Differential Equation (ODE)­based algorithm of the LR-I model is implemented by using Hardware Description Language (I-IDL) Coder that is capable to convert MATLAB Simulink blocks designed into a synthesisable VHSIC Hardware Description Language (VHDL) code and verified using the FPGA-In-the Loop (FIL) Co-simulator. The Xilinx FPGA Yirtex-6 XC6VLX240T ML605 evaluation board is chosen as a platform for the FPGA high performance system which is supported by the 1-lDL Coder. A fixed­point optimisation has been successfully obtained with Percentage Error (PE) and Mean Square Error (MSE) which are -1.08% and 2.28%, respectively. This result has given better performance for the hardware implementation in terms of 27.5% decrement in power consumption and 5.35% decrement in utilization area with maximum frequency 9.819 MHz. By implementing the constructed algorithm into the high performance FPGA system, a new real-time simulation-based analysis technique of cardiac electrical excitation has been successfully developed

Electrocardiogram (ECG/EKG) using FPGA

FPGAs (Field Programmable Gate Arrays) are finding wide acceptance in medical systems for their ability for rapid prototyping of a concept that requires hardware/software co-design, for performing custom processing in parallel at high data rates and be programmed in the field after manufacturing. Based on the market demand, the FPGA design can be changed and no new hardware needs to be purchased as was the case with ASICs (Application Specific Integrated Circuit) and CPLDs (Complex Programmable Logic Device). Medical companies can now move over to FPGAs saving cost and delivering highly-efficient upgradable systems. ECG (Electrocardiogram) is considered to be a must have feature for a medical diagnostic imaging system. This project attempts at implementing ECG heart-rate computation in an FPGA. This project gave me exposure to hardware engineering, learning about the low level chips like Atmel UC3A3256 micro-controller on an Atmel EVK1105 board which is used as a simulator for generating the ECG signal, the operational amplifiers for amplifying and level-shifting the ECG signal, the A/D converter chip for analog to digital conversion of the ECG signal, the internal workings of FPGA, how different hardware components communicate with each other on the system and finally some signal processing to calculate the heart rate value from the ECG signal