9,142 research outputs found

    Building real-time embedded applications on QduinoMC: a web-connected 3D printer case study

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    Single Board Computers (SBCs) are now emerging with multiple cores, ADCs, GPIOs, PWM channels, integrated graphics, and several serial bus interfaces. The low power consumption, small form factor and I/O interface capabilities of SBCs with sensors and actuators makes them ideal in embedded and real-time applications. However, most SBCs run non-realtime operating systems based on Linux and Windows, and do not provide a user-friendly API for application development. This paper presents QduinoMC, a multicore extension to the popular Arduino programming environment, which runs on the Quest real-time operating system. QduinoMC is an extension of our earlier single-core, real-time, multithreaded Qduino API. We show the utility of QduinoMC by applying it to a specific application: a web-connected 3D printer. This differs from existing 3D printers, which run relatively simple firmware and lack operating system support to spool multiple jobs, or interoperate with other devices (e.g., in a print farm). We show how QduinoMC empowers devices with the capabilities to run new services without impacting their timing guarantees. While it is possible to modify existing operating systems to provide suitable timing guarantees, the effort to do so is cumbersome and does not provide the ease of programming afforded by QduinoMC.http://www.cs.bu.edu/fac/richwest/papers/rtas_2017.pdfAccepted manuscrip

    Telemetry downlink interfaces and level-zero processing

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    The technical areas being investigated are as follows: (1) processing of space to ground data frames; (2) parallel architecture performance studies; and (3) parallel programming techniques. Additionally, the University administrative details and the technical liaison between New Mexico State University and Goddard Space Flight Center are addressed

    Puredata Systems for Analytics: Concurrency and Workload Management

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    PureDataTM System for Analytics also called as Netezza is a data warehouse server handling analytic operations capable of providing throughput 1000 times greater and faster than traditional database servers. Impressively, it requires minimal system tuning thereby providing high-end performance as well as requiring a low total cost of ownership (TCO). Database performance is directly linked to the allocation of system resources on a database management system. The heart of the Netezza appliance, Field-Programmable Gate Array (FPGA) plays a key role in boosting the overall performance of a server. I/O operations are always a bottleneck in any database server and it is the FPGA that eradicates the I/O problem in Netezza by filtering the data across each snippet processing unit (SPU), processing and running the queries faster thereby pumping server’s performance greatly. This paper describes the current problems the companies face in a “big data” environment which includes concurrency handling and query performance. There are various factors which affect a query\u27s performance, which includes bad data distribution, stale statistics, server load and uneven system resources. Since this paper is restricted to only the system resources, an in-depth analysis of system resources and its components will be analyzed in this research. A database server’s performance is directly related to its underlying allocation of system resources. Work Load Management (WLM) and each of its features are described in this paper which gives the reader a clear notion of how a query\u27s performance is altered using various mechanisms. The paper describes the current performance problems that exist on the traditional database servers and how the Work Load Management components can be tweaked along with the predefined system configurations to process a query to run faster on a Netezza machine

    Autonomous Attitude Determination System (AADS). Volume 1: System description

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    Information necessary to understand the Autonomous Attitude Determination System (AADS) is presented. Topics include AADS requirements, program structure, algorithms, and system generation and execution

    Many-Task Computing and Blue Waters

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    This report discusses many-task computing (MTC) generically and in the context of the proposed Blue Waters systems, which is planned to be the largest NSF-funded supercomputer when it begins production use in 2012. The aim of this report is to inform the BW project about MTC, including understanding aspects of MTC applications that can be used to characterize the domain and understanding the implications of these aspects to middleware and policies. Many MTC applications do not neatly fit the stereotypes of high-performance computing (HPC) or high-throughput computing (HTC) applications. Like HTC applications, by definition MTC applications are structured as graphs of discrete tasks, with explicit input and output dependencies forming the graph edges. However, MTC applications have significant features that distinguish them from typical HTC applications. In particular, different engineering constraints for hardware and software must be met in order to support these applications. HTC applications have traditionally run on platforms such as grids and clusters, through either workflow systems or parallel programming systems. MTC applications, in contrast, will often demand a short time to solution, may be communication intensive or data intensive, and may comprise very short tasks. Therefore, hardware and software for MTC must be engineered to support the additional communication and I/O and must minimize task dispatch overheads. The hardware of large-scale HPC systems, with its high degree of parallelism and support for intensive communication, is well suited for MTC applications. However, HPC systems often lack a dynamic resource-provisioning feature, are not ideal for task communication via the file system, and have an I/O system that is not optimized for MTC-style applications. Hence, additional software support is likely to be required to gain full benefit from the HPC hardware
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