Formal Synthesis at the Algorithmic Level

. In our terminology, the term "formal synthesis" stands for a synthesis process where the implementation is derived from the specification by applying elementary mathematical rules within a theorem prover. As a result the implementation is guaranteed to be correct. In this paper we introduce a new methodology to formally derive register-transfer structures from descriptions at the algorithmic level via program transformations. Some experimental results at the end of the paper show how the run-time complexity of the synthesis process in our approach could be. 1 Introduction The synthesis of hardware systems is heading toward more and more abstract design levels. This is due to the fact that the systems are becoming more complex and so does the synthesis process for deriving them. Therefore, the correctness of hardware components has become an important matter --- especially in safety-critical domains. By correctness we mean that the synthesis result (implementation) satisfies the synt..