A fast CORDIC co-processor architecture for digital signal processing applications

The coordinate rotational digital computer (CORDIC) is an arithmetic algorithm, which has been used for arithmetic units in the fast computing of elementary functions and for special purpose hardware in programmable logic devices. This paper describes a classification method that can be used for the possible applications of the algorithm and the architecture that is required for fast hardware computing of the algorithm.Área: Redes - Sistemas Operativos - Sistemas de Tiempo Real - Arquitectura de Procesadore

A fast CORDIC co-processor architecture for digital signal processing applications

The coordinate rotational digital computer (CORDIC) is an arithmetic algorithm, which has been used for arithmetic units in the fast computing of elementary functions and for special purpose hardware in programmable logic devices. This paper describes a classification method that can be used for the possible applications of the algorithm and the architecture that is required for fast hardware computing of the algorithm.Área: Redes - Sistemas Operativos - Sistemas de Tiempo Real - Arquitectura de ProcesadoresRed de Universidades con Carreras en Informática (RedUNCI

Hardware and Software Multi-precision Implementations of Cryptographic Algorithms

The software implementations of cryptographic algorithms are considered to be very slow, when there are requirements of multi-precision arithmetic operations on very long integers. These arithmetic operations may include addition, subtraction, multiplication, division and exponentiation. Several research papers have been published providing different solutions to make these operations faster. Digital Signature Algorithm (DSA) is a cryptographic application that requires multi-precision arithmetic operations. These arithmetic operations are mostly based upon modular multiplication and exponentiation on integers of the size of 1024 bits. The use of such numbers is an essential part of providing high security against the cryptanalytic attacks on the authenticated messages. When these operations are implemented in software, performance in terms of speed becomes very low. The major focus of the thesis is the study of various arithmetic operations for public key cryptography and selecting the fast multi-precision arithmetic algorithms for hardware implementation. These selected algorithms are implemented in hardware and software for performance comparison and they are used to implement Digital Signature Algorithm for performance analysis

A Modified Staggered Correction Arithmetic with Enhanced Accuracy and Very Wide Exponent Range

A so called staggered precision arithmetic is a special kind of a multiple precision arithmetic based on the underlying floating point data format (typically IEEE double format) and fast floating point operations as well as exact dot product computations. Due to floating point limitations it is not an arbitrary precision arithmetic. However, it typically allows computations using several hundred mantissa digits. A set of new modified staggered arithmetics for real and complex data as well as for real interval and complex interval data with very wide exponent range is presented. Some applications show the increased accuracy of computed results compared to ordinary staggered interval computations. The very wide exponent range of the new arithmetic operations allows computations far beyond the IEEE data formats. The new arithmetics would be extremly fast, if an exact dot product was available in hardware (the fused accumulate and add instruction is only one step in this direction)

Efficient unified Montgomery inversion with multibit shifting

Computation of multiplicative inverses in finite fields GF(p) and GF(2/sup n/) is the most time-consuming operation in elliptic curve cryptography, especially when affine co-ordinates are used. Since the existing algorithms based on the extended Euclidean algorithm do not permit a fast software implementation, projective co-ordinates, which eliminate almost all of the inversion operations from the curve arithmetic, are preferred. In the paper, the authors demonstrate that affine co-ordinate implementation provides a comparable speed to that of projective co-ordinates with careful hardware realisation of existing algorithms for calculating inverses in both fields without utilising special moduli or irreducible polynomials. They present two inversion algorithms for binary extension and prime fields, which are slightly modified versions of the Montgomery inversion algorithm. The similarity of the two algorithms allows the design of a single unified hardware architecture that performs the computation of inversion in both fields. They also propose a hardware structure where the field elements are represented using a multi-word format. This feature allows a scalable architecture able to operate in a broad range of precision, which has certain advantages in cryptographic applications. In addition, they include statistical comparison of four inversion algorithms in order to help choose the best one amongst them for implementation onto hardware