4,945 research outputs found

    Evaluating Crash Consistency for PM Software using Intel Pin

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    Ongoing advancement in non-volatile memory such as NVDIMMs have prompted to huge improvement in the area of persistent memory. It is faster, byte addressable and can persist without power. It allows direct manipulation of data in memory unlike other memory system like hard disk and SSD . It furthers overcomes the limitation of file system overhead that incurs extra burden to application to handle crash during failure. A Persistent program needs to correctly implement certain crash consistency mechanisms such as undo and redo logging. The program should be able to recover to consistent state after failure. Due to volatile caching and reordering of writes within memory hierarchy, programs need to carefully manage the order in which writes become persistent when implementing crash consistent software. Persistent-memory applications ensure the consistency of persistent data by inserting ordering points between writes to PM allowing the construction of higher-level transaction mechanisms.PM System have introduced new instructions such as CLWB and SFENCE from x86 and DC CVAP from ARM to ensure ordering and further introduced high level transactional libraries to ensure persistence. Required by the crash consistency guarantee, that is a program returns to a consistent state and resumes the execution after a failure, a testing tool is expected to detect inconsistencies during the entire procedure of execution, recovery, and resumption. Therefore, we proposed new method that will the log all the I/Os using intel pin tool and replay the all the I/Os and check the consistency of program by comparing the initial image and a final image.We are checking the consistency of program post failure by emulating the failure by removing some of I/O’s writes while replaying to check if program can recover itself after cras

    Persistent Memory Programming Abstractions in Context of Concurrent Applications

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    The advent of non-volatile memory (NVM) technologies like PCM, STT, memristors and Fe-RAM is believed to enhance the system performance by getting rid of the traditional memory hierarchy by reducing the gap between memory and storage. This memory technology is considered to have the performance like that of DRAM and persistence like that of disks. Thus, it would also provide significant performance benefits for big data applications by allowing in-memory processing of large data with the lowest latency to persistence. Leveraging the performance benefits of this memory-centric computing technology through traditional memory programming is not trivial and the challenges aggravate for parallel/concurrent applications. To this end, several programming abstractions have been proposed like NVthreads, Mnemosyne and intel's NVML. However, deciding upon a programming abstraction which is easier to program and at the same time ensures the consistency and balances various software and architectural trade-offs is openly debatable and active area of research for NVM community. We study the NVthreads, Mnemosyne and NVML libraries by building a concurrent and persistent set and open addressed hash-table data structure application. In this process, we explore and report various tradeoffs and hidden costs involved in building concurrent applications for persistence in terms of achieving efficiency, consistency and ease of programming with these NVM programming abstractions. Eventually, we evaluate the performance of the set and hash-table data structure applications. We observe that NVML is easiest to program with but is least efficient and Mnemosyne is most performance friendly but involves significant programming efforts to build concurrent and persistent applications.Comment: Accepted in HiPC SRS 201
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