SQLite Optimization with Phase Change Memory for Mobile Applications

ABSTRACT Given its pervasive use in smart mobile platforms, there is a compelling need to optimize the performance of sluggish SQLite databases. Popular mobile applications such as messenger, email and social network services rely on SQLite for their data management need. Those mobile applications tend to execute relatively short transactions in the autocommit mode for transactional consistency in databases. This often has adverse effect on the flash memory storage in mobile devices because the small random updates cause high write amplification and high write latency. In order to address this problem, we propose a new optimization strategy, called per-page logging (PPL), for mobile data management, and have implemented the key functions in SQLite/PPL. The hardware component of SQLite/PPL includes phase change memory (PCM) with a byte-addressable, persistent memory abstraction. By capturing an update in a physiological log record and adding it to the PCM log sector, SQLite/PPL can replace a multitude of successive page writes made to the same logical page with much smaller log writes done to PCM much more efficiently. We have observed that SQLite/PPL would potentially improve the performance of mobile applications by an order of magnitude while supporting transactional atomicity and durability

FPGA-based Prototyping Systems for Emerging Memory Technologies,”

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FPGA-based Prototyping Systems for Emerging Memory Technologies

MasterAs DRAM faces its scaling limit, several new memory technologies are considered as candidates for replacing or complementing DRAM main memory. Compared to DRAM, the new memories have two major differences, non-volatility and write overhead in terms of endurance, latency and power. We built two different FPGA-based evaluation boards to evaluate hardware and software designs for new-memory-based main memory: one was a DRAM subsystem with parameterizable latency and non-volatile emulation, and the other used actual new memory chips namely phase-change RAM (PRAM). We experimented with primitive functions and SQLite-based benchmarks on Linux, verifying the workings of new functionalities, e.g., non-volatility and evaluating the impacts of new memory on software performance. In our experiments, a simple design with DRAM/PRAM hybrid memory offers persistency with a performance overhead level 1.8x longer execution time on average, compared with DRAM-only main memory