Towards Complete Emulation of Quantum Algorithms using High-Performance Reconfigurable Computing

Quantum computing is a promising technology that can potentially demonstrate supremacy over classical computing in solving specific classically-intractable problems. However, in its current nascent stage, quantum computing faces major challenges. Two of the main challenges are quantum state decoherence and low scalability of current quantum devices. Decoherence is a process in which the state of the quantum computer is destroyed by interaction with the environment. Decoherence places constraints on the realistic applicability of quantum algorithms as real-life applications usually require complex equivalent quantum circuits to be realized. For example, encoding classical data on quantum computers for solving I/O and data-intensive applications generally requires complex quantum circuits that violate decoherence constraints. In addition, current quantum devices are of intermediate scale, having low quantum bit (qubit) counts and often producing inaccurate or noisy measurements. Consequently, benchmarking of existing quantum algorithms and the investigation of new applications are heavily dependent on classical simulations that use costly, resource-intensive computing platforms. Hardware-based emulation has been alternatively proposed as a more cost-effective and power-efficient approach. Hardware-based emulation methods can take advantage of hardware parallelism and acceleration to produce results at a higher throughput and lower power requirements.This work proposes a hardware-based emulation methodology for quantum algorithms, using cost-effective Field Programmable Gate Array (FPGA) technology. The proposed methodology consists of three components that are required for complete emulation of quantum algorithms; the first component models classical-to-quantum (C2Q) data encoding, the second emulates the behavior of quantum algorithms, and the third models the process of measuring the quantum state and extracting classical information, i.e., quantum-to-classical (Q2C) data decoding. The proposed emulation methodology is used to investigate and optimize methods for C2Q/Q2C data encoding/decoding, as well as several important quantum algorithms such as Quantum Fourier Transform (QFT), Quantum Haar Transform (QHT), and Quantum Grover’s Search (QGS). This work delivers contributions in terms of reducing complexities of quantum circuits, extending and optimizing quantum algorithms, and developing new quantum applications. For example, decoherence-optimized circuits for C2Q/Q2C data encoding/decoding are proposed and evaluated using the proposed emulation methodology. Multi-level decomposable forms of optimized QHT circuits are presented and used to demonstrate dimension reduction of high-resolution data. Additionally, a novel extension to the QGS algorithm is proposed to enable search for dynamically changing multi-patterns of unordered data. Finally, a novel quantum application is presented that combines QHT and dynamic multi-pattern QGS to perform pattern recognition using dimension reduction on high-resolution spatio-spectral data. For higher emulation performance and scalability of the framework, hardware design techniques and hardware architectural optimizations are investigated and proposed. The emulation architectures are designed and implemented on a high-performance reconfigurable computer (HPRC). For reference and comparison, implementations of the proposed quantum circuits are also performed on a state-of-the-art quantum computer. Experimental results show that the proposed hardware architectures enable emulation of quantum algorithms with higher scalability, higher accuracy, and higher throughput, compared to existing hardware-based emulators. As a case study, quantum image processing using multi-spectral images is considered for the experimental evaluations. The analysis and results of this work demonstrate that quantum computers and methodologies based on quantum algorithms will be highly useful in realistic data-intensive domains such as remote-sensing hyperspectral imagery and high-energy physics (HEP)

Memorias matriciales correlacionadas cuánticas, simples y mejoradas: una propuesta para su estudio y simulación sobre GPGPU

En este trabajo se desarrollan-en orden-los fundamentos de la Física Cuántica, y de la Computación Cuántica, una noción completa de las arquitecturas multicapa tolerante a fallos para la implementación física de una computadora cuántica, para completar los primeros cuatro capítulos con las técnicas propias para la simulación de este nuevo paradigma sobre placas multicore del tipo General-Purpose Computing on Graphics Processing Units (GPGPU). La segunda parte de este trabajo consiste en los tres capítulos inmediatamente siguientes, los cuales suman 10 innovaciones en este campo, a saber: 1. el Proceso de Ortogonalización Booleano (POB) con su inversa, 2. el Proceso de Ortogonalización de Gram-Schmidt Mejorado (POGSMe) con su inversa, 3. el Proceso de Ortogonalización Cuántico (POCu) con su inversa, 4. la Red Ortogonalizadora Booleana Sistólica (ROBS), 5. la Red Ortogonalizadora Cuántica Sistólica (ROCS), y 6. una métrica que llamamos Tasa Dimensional de Entrada-Salida (TDES) la cual fue creada para monitorear el impacto del mejorador para la estabilidad del Proceso Ortogonalizador de Gram-Schmidt en el costo computacional final. 7. una versión mejorada de las ya conocidas Memorias Matriciales Correlacionadas Booleanas (MMCB), es decir, la MMCB mejorada (MMCBMe) en base al innovador Proceso de Ortonormalización Booleano (POB) del Capítulo 5, 8. la Memoria Matricial Correlacionada Cuántica (MMCCu), y 9. la MMCCu Mejorada (MMCCuMe) en base al Proceso de Ortogonalización Cuántico (POCu) implementado en forma sistólica y conocida como la Red Ortogonalizadora Cuántica Sistólica (ROCS) del Capítulo 5.10. el Capítulo 7, el cual contiene las simulaciones computacionales, las cuales verifican fehacientemente la mejora en la performance de almacenamiento como resultado de aplicar el POCu a las MMCCu, así como una serie de simulaciones relativas a arreglos uni, bi y tridimensionales, los cuales representan señales, imágenes (multimediales, documentales, satelitales, biométricas, etc.) y video o bien imágenes multi e hiper-espectrales satelitales, tomografías o resonancias magnéticas seriadas, respectivamente. Dichas simulaciones tienen por objeto verificar los atributos de ortogonalización de los algoritmos desarrollados. Dado que es la primera vez que en la literatura se realizan este tipo de simulaciones en GPGPU para esta tecnología, el Capítulo 7 representa en si mismo el décimo aporte del presente trabajo a esta área del conocimiento. Un último capítulo reservado a conclusiones parciales por capítulo y generales del trabajo como un todo.Facultad de Informátic