Methodology for Integrating Computational Tree Logic Model Checking in Unified Modelling Language Artefacts A Case Study of an Embedded Controller

A unified modelling language (UML) based formal verification methodology that can be easily integrated into an embedded system software development life cycle is suggested. The approach augments UML diagrams with formal models through an interfacing domain and adds semantics to these diagrams. The suggested methodology; commences from functional specification and use case modelling, selects the most critical behaviour where formal verification can add value to the development cycle, analyses the selected behaviour using UML state transition diagram, derives a state chart matrix from the same, and a high level language software translates the state chart matrix to a labelled transition system. Safety properties are derived from system specifications and are expressed as computation tree logic (CTL) formulae. CTL model-checking algorithm from the literature is used for model- checking. The applicability of the suggested approach is established using a safety critical embedded controller used for deployment and recovery of sensor structures from an airborne platform

Semantics of UML 2.2 State Machines in Rewriting Logic

While the semantics of (labeled) transition systems and the relations between these are well understood. However, the same has not yet been achieved for UML 2.2 state machines. Their many semantics often is defined in terms of labeled transition systems, because the standard document is ambiguous. A formal, modular core semantics for UML 2.2 state machines is given in rewriting logic

Specification and Animation of Reactive Systems

SOLVE (Specification using an Object-based, LOTOS-defined, Visual language) is designed to allow formal requirements capture, particularly for reactive systems. The SOLVE language is object-based, and formally defined using LOTOS (Language Of Temporal Ordering Specification). SOLVE is supported by tools that allow direct visual animation of systems specified in this language. Animation is supported by translating a SOLVE specification automatically into a LOTOS specification, and then graphically simulating this. A further application is embodied in the XDILL tool that supports requirements specification and visual animation of digital logic circuits. Several illustrative SOLVE examples are given

Embedding object-oriented design in system engineering

The Unified Modeling Language (UML) is a collection of techniques intended to document design decisions about software. This contrasts with systems engineering approaches such as for exampleStatemate and the Yourdon Systems Method (YSM), in which the design of an entire system consisting of software and hardware can be documented. The difference between the system- and the software level is reflected in differences between execution semantics as well as in methodology. In this paper, I show how the UML can be used as a system-level design technique. I give a conceptual framework for engineering design that accommodates the system- as well as the software level and show how techniques from the UML and YSM can be classified within this framework, and how this allows a coherent use of these techniques in a system engineering approach. These ideas are illustrated by a case study in which software for a compact dynamic bus station is designed. Finally, I discuss the consequences of this approach for a semantics of UML constructs that would be appropriate for system-level design

A probabilistic extension of UML statecharts: specification and verification

This paper is the extended technical report that corresponds to a published paper [14]. This paper introduces means to specify system randomness within UML statecharts, and to verify probabilistic temporal properties over such enhanced statecharts which we call probabilistic UML statecharts. To achieve this, we develop a general recipe to extend a statechart semantics with discrete probability distributions, resulting in Markov decision processes as semantic models. We apply this recipe to the requirements-level UML semantics of [8]. Properties of interest for probabilistic statecharts are expressed in PCTL, a probabilistic variant of CTL for processes that exhibit both non-determinism and probabilities. Verification is performed using the model checker Prism. A model checking example shows the feasibility of the suggested approach