A spread spectrum approach to time-domain near-infrared diffuse optical imaging using inexpensive optical transceiver modules

We introduce a compact time-domain system for near-infrared spectroscopy using a spread spectrum technique. The proof-of-concept single channel instrument utilises a low-cost commercially available optical transceiver module as a light source, controlled by a Kintex 7 field programmable gate array (FPGA). The FPGA modulates the optical transceiver with maximum-length sequences at line rates up to 10Gb/s, allowing us to achieve an instrument response function with full width at half maximum under 600ps. The instrument is characterised through a set of detailed phantom measurements as well as proof-of-concept in vivo measurements, demonstrating performance comparable with conventional pulsed time-domain near-infrared spectroscopy systems

Evaluation of NoC on Multi-FPGA Interconnection Using GTX Transceiver

International audienceMulti-FPGA platforms are very popular today for pre-silicon verification of complex designs due to their low cost and high speed. The idea is to divide these systems into smaller subsystems and implement each one on a separate chip. The challenge is that the number of IOs available on FPGA remains constant despite the technological evolution. This problem is resolved by multiplexing several cut-signals using the time division multiplexing scheduling mechanism. This structure has a strong effect on the speed of transmission between FPGAs. However, an inter-FPGA bottleneck appears. In this paper, we focus on evaluating the Network-on-Chip on multi-FPGA using the high speed serial transceiver GTX block. In order to speed up the transmission between FPGAs, GTX Transceiver is used to provide a high bandwidth while using fewer pins compared to existing approaches based on ordinary FPGA IOs pins. Depending on the available multi-gigabit transceiver, the bandwidth per connection is between 3.125 and 28 Gb/s which allows for large amounts of data to be moved quickly between multiple FPGAs. In our evaluation, a VC707 platform based on the Virtex-7 device is used. The simulation results show that the proposed architecture provides low area consumption and latencies under different traffic patterns