Five-Level Flying Capacitor Converter used as a Static Compensator for Current Unbalances in Three-Phase Distribution Systems

This thesis presents and evaluates a solution for unbalanced current loading in three-phase distribution systems. The proposed solution uses the flying capacitor multilevel converter as its main topology for an application known as Unbalanced Current Static Compensator. The fundamental theory, controller design and prototype construction will be presented along with the experimental results. The Unbalanced Current Static Compensator main objective is the balancing of the up-stream currents from the installation point to eliminate the negative- and zero-sequence currents originated by unbalanced single-phase loads. Three separate single-phase flying capacitor converters are controlled independently using a d-q rotating reference frame algorithm to allow easier compensation of reactive power. Simulations of the system were developed in MATLAB/SIMULINK™ in order to validate the design parameters; then, testing of the UCSC prototype was performed to confirm the control algorithm functionality. Finally, experimental result are presented and analyzed

Analysis and optimization of the hardware design of a sic mosfet based power converter with sic schottky diodes utilizing a split output topology

In recent years, the use of power electronic devices for energy conversion with semiconductors such as silicon carbide (SiC) or gallium nitride (GaN) are replacing silicon due to their high thermal conductivity, efficiency, resistance, and the possibility of smaller and thinner designs. For this reason, in order to evaluate the improvement potential of these systems, it is beneficial to realize experimental setups that emulate real operating conditions in order to verify the correct performance of these systems. In this context and based on the previous work done by Giorgio Ferrara, this thesis focuses on the analysis and identification of improvements of a SiC MOSFET-based power electronic converter with the aim of suggesting and studying different solutions that ensure a high-performance operation that allows its correct implementation in motor traction and grid-connected applications. During the thesis work, it is carried out an in-depth analysis of the voltage peaks between drain and source originated by the fast switching of the MOSFET to evaluate the use of Snubber capacitors and it is made a new hardware design of the gate driver board using isolated gate drivers to improve the dynamic behaviour in the switching transients of the SiC transistors and provide safety and robustness to the system. Finally, maintaining the original design of the converter, it implements the split output topology to evaluate possible solutions to the problems of electromagnetic interference (EMI) and the crosstalk effect that occurs with high frequency switchingNegli ultimi anni, l'uso di dispositivi elettronici di potenza per la conversione dell'energia con semiconduttori come il carburo di silicio (SiC) o il nitruro di gallio (GaN) sta sostituendo il silicio grazie alla sua elevata conducibilità termica, all'efficienza, alla resistenza e alla possibilità di realizzare disegni più piccoli e sottili. Per questo motivo, al fine di valutare il potenziale di miglioramento di questi sistemi, è utile realizzare set-up sperimentali che emulino le condizioni operative reali, in modo da poter eseguire diversi test per verificare il corretto comportamento di questi sistemi. In tale contesto e a partire dal precedente lavoro effettuato per Giorgio Ferrara, la presente tesi si concentra nell' analisi e nidentificazione di miglioramenti di un convertitore di potenza DC-AC a commutazione, al fine di proporre e studiare diverse soluzioni che garantiscano le elevate prestazioni che assicurano la sua corretta implementazione in applicazioni di trazione a motore e di connessione alla rete. Durante il lavoro di tesi, si analizza in dettaglio il fenomeno di picchi di tensione tra drain e source causato per la commutazione veloce del MOSFET e si valuta l'utilizzo di condensatori snubber; in più si realizza un nuovo disegno hardware della board di gate driver utilizzando gate driver isolati per migliorare il comportamento dinamico nei transitori di commutazione dei transistor SiC e per fornire sicurezza e robustezza al sistema. Per finire, mantenendo il disegno originale del convertitore, implementa la topologia di uscita Split Output per valutare possibili soluzioni ai problemi di interferenza elettromagnetica (EMI) e all'effetto diafonia che si produce con la commutazione ad alta frequenzaObjectius de Desenvolupament Sostenible::9 - Indústria, Innovació i Infraestructura::9.5 - Augmentar la investigació científica i millorar la capacitat tecnològica dels sectors industrials de tots els països, en particular els països en desenvolupament, entre d’altres maneres fomentant la innovació i augmentant substancialment, d’aquí al 2030, el nombre de persones que treballen en el camp de la investigació i el desenvolupa­ment per cada milió d’habitants, així com la despesa en investigació i desenvolupament dels sectors públic i priva

Analysis and optimization of the hardware design of a sic mosfet based power converter with sic schottky diodes utilizing a split output topology

In recent years, the use of power electronic devices for energy conversion with semiconductors such as silicon carbide (SiC) or gallium nitride (GaN) are replacing silicon due to their high thermal conductivity, efficiency, resistance, and the possibility of smaller and thinner designs. For this reason, in order to evaluate the improvement potential of these systems, it is beneficial to realize experimental setups that emulate real operating conditions in order to verify the correct performance of these systems. In this context and based on the previous work done by Giorgio Ferrara, this thesis focuses on the analysis and identification of improvements of a SiC MOSFET-based power electronic converter with the aim of suggesting and studying different solutions that ensure a high-performance operation that allows its correct implementation in motor traction and grid-connected applications. During the thesis work, it is carried out an in-depth analysis of the voltage peaks between drain and source originated by the fast switching of the MOSFET to evaluate the use of Snubber capacitors and it is made a new hardware design of the gate driver board using isolated gate drivers to improve the dynamic behaviour in the switching transients of the SiC transistors and provide safety and robustness to the system. Finally, maintaining the original design of the converter, it implements the split output topology to evaluate possible solutions to the problems of electromagnetic interference (EMI) and the crosstalk effect that occurs with high frequency switchingNegli ultimi anni, l'uso di dispositivi elettronici di potenza per la conversione dell'energia con semiconduttori come il carburo di silicio (SiC) o il nitruro di gallio (GaN) sta sostituendo il silicio grazie alla sua elevata conducibilità termica, all'efficienza, alla resistenza e alla possibilità di realizzare disegni più piccoli e sottili. Per questo motivo, al fine di valutare il potenziale di miglioramento di questi sistemi, è utile realizzare set-up sperimentali che emulino le condizioni operative reali, in modo da poter eseguire diversi test per verificare il corretto comportamento di questi sistemi. In tale contesto e a partire dal precedente lavoro effettuato per Giorgio Ferrara, la presente tesi si concentra nell' analisi e nidentificazione di miglioramenti di un convertitore di potenza DC-AC a commutazione, al fine di proporre e studiare diverse soluzioni che garantiscano le elevate prestazioni che assicurano la sua corretta implementazione in applicazioni di trazione a motore e di connessione alla rete. Durante il lavoro di tesi, si analizza in dettaglio il fenomeno di picchi di tensione tra drain e source causato per la commutazione veloce del MOSFET e si valuta l'utilizzo di condensatori snubber; in più si realizza un nuovo disegno hardware della board di gate driver utilizzando gate driver isolati per migliorare il comportamento dinamico nei transitori di commutazione dei transistor SiC e per fornire sicurezza e robustezza al sistema. Per finire, mantenendo il disegno originale del convertitore, implementa la topologia di uscita Split Output per valutare possibili soluzioni ai problemi di interferenza elettromagnetica (EMI) e all'effetto diafonia che si produce con la commutazione ad alta frequenzaObjectius de Desenvolupament Sostenible::9 - Indústria, Innovació i Infraestructura::9.5 - Augmentar la investigació científica i millorar la capacitat tecnològica dels sectors industrials de tots els països, en particular els països en desenvolupament, entre d’altres maneres fomentant la innovació i augmentant substancialment, d’aquí al 2030, el nombre de persones que treballen en el camp de la investigació i el desenvolupa­ment per cada milió d’habitants, així com la despesa en investigació i desenvolupament dels sectors públic i priva

Evaluation of DC voltage ripple in three-phase PWM voltage source inverters

Determination of dc-link voltage switching ripple in three-phase PWM voltage source inverters (VSI) is important for the selection and design of the dc-link capacitor. In this paper the complete analysis of the dc-link voltage ripple is given for three-phase PWM VSIs, in case of dc source impedance and balanced load. The dc voltage ripple amplitude is analytically determined as a function of amplitude and phase angle of output current, and modulation index. In particular, peak-to-peak distribution and maximum amplitude over the fundamental period of the dc voltage switching ripple are obtained. Guidelines for designing the dc-link capacitor are given on the basis of the dc-voltage ripple requirements. Simulations results carried out by Matlab/Simulink are provided to verify the analytical developments

Design and Implementation of a Modular Test Bed Platform for Hardware-In-the-Loop Simulation of Electric Vehicles

Over the course of the last decade, electric vehicles have seen explosive growth and interest with public adoption and shifting research and development priorities by original equipment manufacturers towards these new powertrains. However, the development of electric vehicles remain costly due to new technologies being implemented in the vehicle with the final cost ultimately being passed down to consumers. This method of developing new products where the price does not justify the product in the eyes of consumers hinders the adoption of the next generation of environmentally friendly vehicles. To verify electric vehicle drivetrain platforms and software models, test beds with specific capability to simulate the entire vehicle are required. Currently, an abundance of valuable engineering resources are dedicated to creating full-scale test beds and full- sized vehicles for testing. Only then, at this stage in the development cycle, are drivetrain tests conducted outside of simulation models. Getting to this first level of functional testing requires using valuable time waiting for components to be designed, manufactured, validated, and installed before the system can be tested. The full-scale vehicle test bed becomes expensive, consumes a lot of space, and cannot be reconfigured easily without changing key components. Therefore, this thesis presents a systematic approach to down-scaling full-size electric vehicles’ parameters and environmental conditions to a level that can be handled by a small-scale hardware-in-the-loop simulation test bed. The method for taking the results obtained from the test bed and scaling them back up to the full-size vehicle level are also examined for completion. The hardware-in-the-loop test bed is realized using a twoelectric machine system. The electric machine responsible for the electric vehicle propulsion is the traction motor and is tasked with maintaining the vehicle speed. The other electric machine, directly coupled to the first machine, is controlled by the simulation environment. This machine is the load motor which emulates the vehicle operating environment including the forces acting on the vehicle. This motor also compensates for all losses experienced by the actual hardware setup. A detailed explanation of the entire hardware-in-the-loop setup is discussed with specific details relevant to the system design. The modularity of the system, allowing each block of the setup to be easily replaced, and making the test bed highly re-configurable, is also discussed in detail