434 research outputs found
Linear Time Subgraph Counting, Graph Degeneracy, and the Chasm at Size Six
We consider the problem of counting all k-vertex subgraphs in an input graph, for any constant k. This problem (denoted SUB-CNT_k) has been studied extensively in both theory and practice. In a classic result, Chiba and Nishizeki (SICOMP 85) gave linear time algorithms for clique and 4-cycle counting for bounded degeneracy graphs. This is a rich class of sparse graphs that contains, for example, all minor-free families and preferential attachment graphs. The techniques from this result have inspired a number of recent practical algorithms for SUB-CNT_k. Towards a better understanding of the limits of these techniques, we ask: for what values of k can SUB_CNT_k be solved in linear time?
We discover a chasm at k=6. Specifically, we prove that for k < 6, SUB_CNT_k can be solved in linear time. Assuming a standard conjecture in fine-grained complexity, we prove that for all k ? 6, SUB-CNT_k cannot be solved even in near-linear time
Constant-Delay Enumeration for Nondeterministic Document Spanners
We consider the information extraction framework known as document spanners,
and study the problem of efficiently computing the results of the extraction
from an input document, where the extraction task is described as a sequential
variable-set automaton (VA). We pose this problem in the setting of enumeration
algorithms, where we can first run a preprocessing phase and must then produce
the results with a small delay between any two consecutive results. Our goal is
to have an algorithm which is tractable in combined complexity, i.e., in the
sizes of the input document and the VA; while ensuring the best possible data
complexity bounds in the input document size, i.e., constant delay in the
document size. Several recent works at PODS'18 proposed such algorithms but
with linear delay in the document size or with an exponential dependency in
size of the (generally nondeterministic) input VA. In particular, Florenzano et
al. suggest that our desired runtime guarantees cannot be met for general
sequential VAs. We refute this and show that, given a nondeterministic
sequential VA and an input document, we can enumerate the mappings of the VA on
the document with the following bounds: the preprocessing is linear in the
document size and polynomial in the size of the VA, and the delay is
independent of the document and polynomial in the size of the VA. The resulting
algorithm thus achieves tractability in combined complexity and the best
possible data complexity bounds. Moreover, it is rather easy to describe, in
particular for the restricted case of so-called extended VAs. Finally, we
evaluate our algorithm empirically using a prototype implementation.Comment: 29 pages. Extended version of arXiv:1807.09320. Integrates all
corrections following reviewer feedback. Outside of some minor formatting
differences and tweaks, this paper is the same as the paper to appear in the
ACM TODS journa
An Enumerative Perspective on Connectivity
Connectivity (or equivalently, unweighted maximum flow) is an important
measure in graph theory and combinatorial optimization. Given a graph with
vertices and , the connectivity from to is
defined to be the maximum number of edge-disjoint paths from to in .
Much research has gone into designing fast algorithms for computing
connectivities in graphs. Previous work showed that it is possible to compute
connectivities for all pairs of vertices in directed graphs with edges in
time [Chueng, Lau, and Leung, FOCS 2011], where is the exponent of matrix multiplication. For the related
problem of computing "small connectivities," it was recently shown that for any
positive integer , we can compute for all pairs of
vertices in a directed graph with nodes in
time [Akmal and Jin, ICALP 2023].
In this paper, we present an alternate exposition of these
and time algorithms, with
simpler proofs of correctness. Earlier proofs were somewhat indirect,
introducing an elegant but ad hoc "flow vector framework" for showing
correctness of these algorithms. In contrast, we observe that these algorithms
for computing exact and small connectivity values can be interpreted as testing
whether certain generating functions enumerating families of edge-disjoint
paths are nonzero. This new perspective yields more transparent proofs, and
ties the approach for these problems more closely to the literature surrounding
algebraic graph algorithms
A C-DAG task model for scheduling complex real-time tasks on heterogeneous platforms: preemption matters
Recent commercial hardware platforms for embedded real-time systems feature
heterogeneous processing units and computing accelerators on the same
System-on-Chip. When designing complex real-time application for such
architectures, the designer needs to make a number of difficult choices: on
which processor should a certain task be implemented? Should a component be
implemented in parallel or sequentially? These choices may have a great impact
on feasibility, as the difference in the processor internal architectures
impact on the tasks' execution time and preemption cost. To help the designer
explore the wide space of design choices and tune the scheduling parameters, in
this paper we propose a novel real-time application model, called C-DAG,
specifically conceived for heterogeneous platforms. A C-DAG allows to specify
alternative implementations of the same component of an application for
different processing engines to be selected off-line, as well as conditional
branches to model if-then-else statements to be selected at run-time. We also
propose a schedulability analysis for the C-DAG model and a heuristic
allocation algorithm so that all deadlines are respected. Our analysis takes
into account the cost of preempting a task, which can be non-negligible on
certain processors. We demonstrate the effectiveness of our approach on a large
set of synthetic experiments by comparing with state of the art algorithms in
the literature
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