Energy Consumption Modeling of H.264/AVC Video Decoding for GPP and DSP

International audienceMobile devices such as smart-phones and tablets are becoming the most important channel for delivering end-user Internet traffic especially multimedia content. One of the most popular multimedia application is video streaming. The video decoding process of this application is compute-intensive and is responsible of the consumption of a considerable part of the energy budget. Those mobile devices contain heterogeneous processing elements among-which we find Digital Signal Processors (DSP) and General Purpose Processors (GPP). In this context, the performance and energy estimation of those complex platforms is a difficult and time consuming task especially when considering both hardware and applicative parameters. In this paper, we propose a methodology for developing a unified high level video decoding performance and energy consumption analytical model for embedded heterogeneous platforms. This methodology is based on experimental measurements conducted on an embedded low-power platform. The developed model describes the performance and the energy consumption of H.264/AVC video decoding on both GPP and DSP in terms of video bit-rate, clock frequency and a set of comprehensive hardware and video related coefficients. It achieves a balance between a too abstract high level model and a detailed lower level one while guaranteeing a very good prediction properties (R-squared = 97%) for the tested videos. As a use case, we show that our model allows to accurately determine the bit-rate values for which video decoding on GPP is more energy-efficient than on DSP for a given platform

Embracing Visual Experience and Data Knowledge: Efficient Embedded Memory Design for Big Videos and Deep Learning

Energy efficient memory designs are becoming increasingly important, especially for applications related to mobile video technology and machine learning. The growing popularity of smart phones, tablets and other mobile devices has created an exponential demand for video applications in today?s society. When mobile devices display video, the embedded video memory within the device consumes a large amount of the total system power. This issue has created the need to introduce power-quality tradeoff techniques for enabling good quality video output, while simultaneously enabling power consumption reduction. Similarly, power efficiency issues have arisen within the area of machine learning, especially with applications requiring large and fast computation, such as neural networks. Using the accumulated data knowledge from various machine learning applications, there is now the potential to create more intelligent memory with the capability for optimized trade-off between energy efficiency, area overhead, and classification accuracy on the learning systems. In this dissertation, a review of recently completed works involving video and machine learning memories will be covered. Based on the collected results from a variety of different methods, including: subjective trials, discovered data-mining patterns, software simulations, and hardware power and performance tests, the presented memories provide novel ways to significantly enhance power efficiency for future memory devices. An overview of related works, especially the relevant state-of-the-art research, will be referenced for comparison in order to produce memory design methodologies that exhibit optimal quality, low implementation overhead, and maximum power efficiency.National Science FoundationND EPSCoRCenter for Computationally Assisted Science and Technology (CCAST