8,858 research outputs found

    Side information exploitation, quality control and low complexity implementation for distributed video coding

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    Distributed video coding (DVC) is a new video coding methodology that shifts the highly complex motion search components from the encoder to the decoder, such a video coder would have a great advantage in encoding speed and it is still able to achieve similar rate-distortion performance as the conventional coding solutions. Applications include wireless video sensor networks, mobile video cameras and wireless video surveillance, etc. Although many progresses have been made in DVC over the past ten years, there is still a gap in RD performance between conventional video coding solutions and DVC. The latest development of DVC is still far from standardization and practical use. The key problems remain in the areas such as accurate and efficient side information generation and refinement, quality control between Wyner-Ziv frames and key frames, correlation noise modelling and decoder complexity, etc. Under this context, this thesis proposes solutions to improve the state-of-the-art side information refinement schemes, enable consistent quality control over decoded frames during coding process and implement highly efficient DVC codec. This thesis investigates the impact of reference frames on side information generation and reveals that reference frames have the potential to be better side information than the extensively used interpolated frames. Based on this investigation, we also propose a motion range prediction (MRP) method to exploit reference frames and precisely guide the statistical motion learning process. Extensive simulation results show that choosing reference frames as SI performs competitively, and sometimes even better than interpolated frames. Furthermore, the proposed MRP method is shown to significantly reduce the decoding complexity without degrading any RD performance. To minimize the block artifacts and achieve consistent improvement in both subjective and objective quality of side information, we propose a novel side information synthesis framework working on pixel granularity. We synthesize the SI at pixel level to minimize the block artifacts and adaptively change the correlation noise model according to the new SI. Furthermore, we have fully implemented a state-of-the-art DVC decoder with the proposed framework using serial and parallel processing technologies to identify bottlenecks and areas to further reduce the decoding complexity, which is another major challenge for future practical DVC system deployments. The performance is evaluated based on the latest transform domain DVC codec and compared with different standard codecs. Extensive experimental results show substantial and consistent rate-distortion gains over standard video codecs and significant speedup over serial implementation. In order to bring the state-of-the-art DVC one step closer to practical use, we address the problem of distortion variation introduced by typical rate control algorithms, especially in a variable bit rate environment. Simulation results show that the proposed quality control algorithm is capable to meet user defined target distortion and maintain a rather small variation for sequence with slow motion and performs similar to fixed quantization for fast motion sequence at the cost of some RD performance. Finally, we propose the first implementation of a distributed video encoder on a Texas Instruments TMS320DM6437 digital signal processor. The WZ encoder is efficiently implemented, using rate adaptive low-density-parity-check accumulative (LDPCA) codes, exploiting the hardware features and optimization techniques to improve the overall performance. Implementation results show that the WZ encoder is able to encode at 134M instruction cycles per QCIF frame on a TMS320DM6437 DSP running at 700MHz. This results in encoder speed 29 times faster than non-optimized encoder implementation. We also implemented a highly efficient DVC decoder using both serial and parallel technology based on a PC-HPC (high performance cluster) architecture, where the encoder is running in a general purpose PC and the decoder is running in a multicore HPC. The experimental results show that the parallelized decoder can achieve about 10 times speedup under various bit-rates and GOP sizes compared to the serial implementation and significant RD gains with regards to the state-of-the-art DISCOVER codec

    A low-complexity and efficient encoder rate control solution for distributed residual video coding.

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    Existing encoder rate control (ERC) solutions have two technical limitations that prevent them from being widely used in real-world applications. One is that encoder side information (ESI) is required to be generated which increases the complexity at the encoder. The other is that rate estimation is performed at bit plane level which incurs computation overheads and latency when many bit planes exist. To achieve a low-complexity encoder, we propose a new ERC solution that combines an efficient encoder block mode decision (EBMD) for the distributed residual video coding (DRVC). The main contributions of this paper are as follows: 1) ESI is not required as our ERC is based on the analysis of the statistical characteristics of the decoder side information (DSI); 2) a simple EBMD is introduced which only employs the values of residual pixels at the encoder to classify blocks into Intra mode, Skip mode, and WZ mode; 3) an ERC solution using pseudo-random sequence scrambling is proposed to estimate rates for all WZ blocks at frame level instead of at bit plane level, i.e., only one rate is estimated; and 4) a quantization-index estimation algorithm (QIEA) is proposed to solve the problem of rate underestimation. The simulation results show that the proposed solution is not only low complex but also efficient in both the block mode decision and the rate estimation. Also, as compared to DISCOVER system and the state-of-the-art ERC solution, our solution demonstrates a competitive rate-distortion(RD)performance. Due to maintain the low-complexity nature of the encoder and have good RD performance, we believe that our ERC solution is promising in practice

    Distributed video coding for wireless video sensor networks: a review of the state-of-the-art architectures

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    Distributed video coding (DVC) is a relatively new video coding architecture originated from two fundamental theorems namely, Slepian–Wolf and Wyner–Ziv. Recent research developments have made DVC attractive for applications in the emerging domain of wireless video sensor networks (WVSNs). This paper reviews the state-of-the-art DVC architectures with a focus on understanding their opportunities and gaps in addressing the operational requirements and application needs of WVSNs

    Intra-WZ quantization mismatch in distributed video coding

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    During the past decade, Distributed Video Coding (DVC) has emerged as a new video coding paradigm, shifting the complexity from the encoder-to the decoder-side. This paper addresses a problem of current DVC architectures that has not been studied in the literature so far, that is, the mismatch between the intra and Wyner-Ziv (WZ) quantization processes. Due to this mismatch, WZ rate is spent even for spatial regions that are accurately approximated by the side-information. As a solution, this paper proposes side-information generation using selective unidirectional motion compensation from temporally adjacent WZ frames. Experimental results show that the proposed approach yields promising WZ rate gains of up to 7% relative to the conventional method

    Transform domain distributed video coding using larger transform blocks

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    Distributed Video Coding (DVC) displays promising performance at low spatial resolutions but begins to struggle as the resolution increases. One of the limiting aspects is its 4x4 block size of Discrete Cosine Transform (DCT) which is often impractical at higher resolutions. This paper investigates the impact of exploiting larger DCT block sizes on the performance of transform domain DVC at higher spatial resolutions. In order to utilize a larger block size in DVC, appropriate quantisers have to be selected and this has been solved by means of incorporating a content-aware quantisation mechanism to generate image specific quantisation matrix for any DCT block size. Experimental results confirm that the larger 8x8 block size consistently exhibit superior RD performance for CIF resolution sequences compared to the smaller 4x4 block sizes. Significant PSNR improvement has been observed for 16x16 block size at 4CIF resolution with up to 1.78dB average PSNR gain compared to its smaller block alternatives

    Turbo-Detected Unequal Protection MPEG-4 Wireless Video Telephony using Multi-Level Coding, Trellis Coded Modulation and Space-Time Trellis Coding

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    Most multimedia source signals are capable of tolerating lossy, rather than lossless delivery to the human eye, ear and other human sensors. The corresponding lossy and preferably low-delay multimedia source codecs however exhibit unequal error sensitivity, which is not the case for Shannon’s ideal entropy codec. This paper proposes a jointly optimised turbo transceiver design capable of providing unequal error protection for MPEG-4 coding aided wireless video telephony. The transceiver investigated consists of space-time trellis coding (STTC) invoked for the sake of mitigating the effects of fading, in addition to bandwidth efficient trellis coded modulation or bit-interleaved coded modulation, combined with a multi-level coding scheme employing either two different-rate non-systematic convolutional codes (NSCs) or two recursive systematic convolutional codes for yielding a twin-class unequal-protection. A single-class protection based benchmark scheme combining STTC and NSC is used for comparison with the unequal-protection scheme advocated. The video performance of the various schemes is evaluated when communicating over uncorrelated Rayleigh fading channels. It was found that the proposed scheme requires about 2.8 dBs lower transmit power than the benchmark scheme in the context of the MPEG-4 videophone transceiver at a similar decoding complexity
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