34,558 research outputs found
Exploiting Non-Causal CPU-State Information for Energy-Efficient Mobile Cooperative Computing
Scavenging the idling computation resources at the enormous number of mobile
devices can provide a powerful platform for local mobile cloud computing. The
vision can be realized by peer-to-peer cooperative computing between edge
devices, referred to as co-computing. This paper considers a co-computing
system where a user offloads computation of input-data to a helper. The helper
controls the offloading process for the objective of minimizing the user's
energy consumption based on a predicted helper's CPU-idling profile that
specifies the amount of available computation resource for co-computing.
Consider the scenario that the user has one-shot input-data arrival and the
helper buffers offloaded bits. The problem for energy-efficient co-computing is
formulated as two sub-problems: the slave problem corresponding to adaptive
offloading and the master one to data partitioning. Given a fixed offloaded
data size, the adaptive offloading aims at minimizing the energy consumption
for offloading by controlling the offloading rate under the deadline and buffer
constraints. By deriving the necessary and sufficient conditions for the
optimal solution, we characterize the structure of the optimal policies and
propose algorithms for computing the policies. Furthermore, we show that the
problem of optimal data partitioning for offloading and local computing at the
user is convex, admitting a simple solution using the sub-gradient method.
Last, the developed design approach for co-computing is extended to the
scenario of bursty data arrivals at the user accounting for data causality
constraints. Simulation results verify the effectiveness of the proposed
algorithms.Comment: Submitted to possible journa
Eyeriss v2: A Flexible Accelerator for Emerging Deep Neural Networks on Mobile Devices
A recent trend in DNN development is to extend the reach of deep learning
applications to platforms that are more resource and energy constrained, e.g.,
mobile devices. These endeavors aim to reduce the DNN model size and improve
the hardware processing efficiency, and have resulted in DNNs that are much
more compact in their structures and/or have high data sparsity. These compact
or sparse models are different from the traditional large ones in that there is
much more variation in their layer shapes and sizes, and often require
specialized hardware to exploit sparsity for performance improvement. Thus,
many DNN accelerators designed for large DNNs do not perform well on these
models. In this work, we present Eyeriss v2, a DNN accelerator architecture
designed for running compact and sparse DNNs. To deal with the widely varying
layer shapes and sizes, it introduces a highly flexible on-chip network, called
hierarchical mesh, that can adapt to the different amounts of data reuse and
bandwidth requirements of different data types, which improves the utilization
of the computation resources. Furthermore, Eyeriss v2 can process sparse data
directly in the compressed domain for both weights and activations, and
therefore is able to improve both processing speed and energy efficiency with
sparse models. Overall, with sparse MobileNet, Eyeriss v2 in a 65nm CMOS
process achieves a throughput of 1470.6 inferences/sec and 2560.3 inferences/J
at a batch size of 1, which is 12.6x faster and 2.5x more energy efficient than
the original Eyeriss running MobileNet. We also present an analysis methodology
called Eyexam that provides a systematic way of understanding the performance
limits for DNN processors as a function of specific characteristics of the DNN
model and accelerator design; it applies these characteristics as sequential
steps to increasingly tighten the bound on the performance limits.Comment: accepted for publication in IEEE Journal on Emerging and Selected
Topics in Circuits and Systems. This extended version on arXiv also includes
Eyexam in the appendi
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