An Investigation of Reliability of High Density Electronic Package-to-Board Interconnections from the Perspective of Solder Joint Metallurgy

The integration and miniaturization trend of the electronic packaging leads to much finer pitch of the device and package lead terminations. Several reliability concerns and issues that were previously not encountered are now surfacing. The objective of this thesis work is to investigate the reliability of the package-to-board interconnection from the perspective of solder joint metallurgy. It was carried out with several advanced packages such as CSP, WLCSP and leadless ceramic packages on organic laminate PWBs using tin-silver-copper based interconnection materials. The assemblies were subjected to several loading conditions and levels such as thermal, mechanical, and environmental stresses. As expected, the board level reliability (BLR) of electronic assemblies strongly depended on microstructure and morphology of the solder joints. Dispersion strengthening effect of the intermetallic compounds (IMCs), coarsening of the IMC particles, strain rate hardening, solder fatigue, and recrystallization of Sn grains in the highly stressed areas were observed. These were found to directly impact Pb-free solder joint reliability. Appropriate thermal aging can improve joint reliability up to 50% due to coarsening of the IMC particles. In addition, other factors such as dissolution of metals, interfacial reactions, IMC spalling, and cross interaction of surface materials on the two sides of the joints were also observed and discussed. The effects can be expressed as a series of interactive relationships: materials (pad surface materials and solder alloy composition) and/or soldering process lead to microstructure change in bulk solder and/or at interface, which in turn leads to joint reliability variation

Development of a Rapid Fatigue Life Testing Method for Reliability Assessment of Flip-Chip Solder Interconnects

The underlying physics of failure are critical in assessing the long term reliability of power packages in their intended field applications, yet traditional reliability determination methods are largely inadequate when considering thermomechanical failures. With current reliability determination methods, long test durations, high costs, and a conglomerate of concurrent reliability degrading threat factors make effective understanding of device reliability difficult and expensive. In this work, an alternative reliability testing apparatus and associated protocol was developed to address these concerns; targeting rapid testing times with minimal cost while preserving fatigue life prediction accuracy. Two test stands were fabricated to evaluate device reliability at high frequency (60 cycles/minute) with the first being a single-directional unit capable of exerting large forces (up to 20 N) on solder interconnects in one direction. The second test stand was developed to allow for bi-directional application of stress and the integration of an oven to enable testing at elevated steady-state temperatures. Given the high frequency of testing, elevated temperatures are used to emulate the effects of creep on solder fatigue lifetime. Utilizing the mechanical force of springs to apply shear loads to solder interconnects within the devices, the reliability of a given device to withstand repeated cycling was studied using resistance monitoring techniques to detect the number of cycles-to-failure (CTF). Resistance monitoring was performed using specially designed and fabricated, device analogous test vehicles assembled with the ability to monitor circuit resistance in situ. When a resistance rise of 30 % was recorded, the device was said to have failed. A mathematical method for quantifying the plastic work density (amount of damage) sustained by the solder interconnects prior to failure was developed relying on the relationship between Hooke’s Law for springs and damage deflection to accurately assess the mechanical strength of tested devices