A Review of Ground-Bouncing-Noise Minimization Techniques in MTCMOS Circuits

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Reconfigurable Mobile Multimedia Systems

This paper discusses reconfigurability issues in lowpower hand-held multimedia systems, with particular emphasis on energy conservation. We claim that a radical new approach has to be taken in order to fulfill the requirements - in terms of processing power and energy consumption - of future mobile applications. A reconfigurable systems-architecture in combination with a QoS driven operating system is introduced that can deal with the inherent dynamics of a mobile system. We present the preliminary results of studies we have done on reconfiguration in hand-held mobile computers: by having reconfigurable media streams, by using reconfigurable processing modules and by migrating functions

Energy-efficiency improvements for optical access

This article discusses novel approaches to improve energy efficiency of different optical access technologies, including time division multiplexing passive optical network (TDM-PON), time and wavelength division multiplexing PON (TWDM-PON), point-to-point (PTP) access network, wavelength division multiplexing PON (WDM-PON), and orthogonal frequency division multiple access PON (OFDMA-PON). These approaches include cyclic sleep mode, energy-efficient bit interleaving protocol, power reduction at component level, or frequency band selection. Depending on the target optical access technology, one or a combination of different approaches can be applied

A Low-Voltage, Low-Power 4-bit BCD Adder, designed using the Clock Gated Power Gating, and the DVT Scheme

This paper proposes a Low-Power, Energy Efficient 4-bit Binary Coded Decimal (BCD) adder design where the conventional 4-bit BCD adder has been modified with the Clock Gated Power Gating Technique. Moreover, the concept of DVT (Dual-vth) scheme has been introduced while designing the full adder blocks to reduce the Leakage Power, as well as, to maintain the overall performance of the entire circuit. The reported architecture of 4-bit BCD adder is designed using 45 nm technology and it consumes 1.384 {\mu}Watt of Average Power while operating with a frequency of 200 MHz, and a Supply Voltage (Vdd) of 1 Volt. The results obtained from different simulation runs on SPICE, indicate the superiority of the proposed design compared to the conventional 4-bit BCD adder. Considering the product of Average Power and Delay, for the operating frequency of 200 MHz, a fair 47.41 % reduction compared to the conventional design has been achieved with this proposed scheme.Comment: To appear in the proceedings of 2013 IEEE International Conference on Signal Processing, Computing and Control (ISPCC,13

Dynamic Sleep Scheduling on Air Pollution Levels Monitoring with Wireless Sensor Network

Wireless Sensor Network (WSN) can be applied for Air Pollution Level Monitoring System that have been determined by the Environmental Impact Management Agency which is  PM10, SO2, O3, NO2 and CO. In WSN, node system is constrained to a limited power supply, so that the node system has a lifetime. To doing lifetime maximization, power management scheme is required and sensor nodes should use energy efficiently. This paper proposes dynamic sleep scheduling using Time Category-Fuzzy Logic (Time-Fuzzy) Scheduling as a reference for calculating time interval for sleep and activated node system to support power management scheme. This research contributed in power management design to be applied to the WSN system to reduce energy expenditure. From the test result in real hardware node system, it can be seen that Time-Fuzzy Scheduling is better in terms of using the battery and it is better in terms of energy consumption too because it is more efficient 51.85% when it is compared with Fuzzy Scheduling, it is more efficient 68.81% when it is compared with Standard Scheduling and it is more efficient 85.03% when compared with No Scheduling