CMOS Transmitter using Pulse-Width Modulation Pre-Emphasis achieving 33dB Loss Compensation at 5-Gb/s

A digital transmitter pre-emphasis technique is presented that is based on pulse-width modulation, instead of finite impulse response (FIR) filtering. The technique fits well to future high-speed low-voltage CMOS processes. A 0.13 /spl mu/m CMOS transmitter achieves more than 5 Gb/s (2-PAM) over 25 m of standard RG-58U low-end coaxial copper cable. The test chip compensates for up to 33 dB of channel loss at the fundamental signaling frequency (2.5 GHz), which is the highest figure compared to literature

Wireless sensor platform for harsh environments

Reliable and efficient sensing becomes increasingly difficult in harsher environments. A sensing module for high-temperature conditions utilizes a digital, rather than analog, implementation on a wireless platform to achieve good quality data transmission. The module comprises a sensor, integrated circuit, and antenna. The integrated circuit includes an amplifier, A/D converter, decimation filter, and digital transmitter. To operate, an analog signal is received by the sensor, amplified by the amplifier, converted into a digital signal by the A/D converter, filtered by the decimation filter to address the quantization error, and output in digital format by the digital transmitter and antenna

Análisis de un Transmisor Digital de HF Basado en la Técnica de Eliminación y Recuperación de Envolvente

An HF EER (Envelope Elimination and Restoration) Digital Transmitter simulation is presented in this paper. Effects that increase the IMD (Intermodulation Distortion) levels in an EER system are described and simulated. Basically, the main effects are the limitation of the envelope bandwidth, AMAM distortion and AM-PM distortion at the power amplifier stage, and the delay between the envelope and phase branches. These effects deteriorate the EER Digital Transmitter linearity. By means of this simulation, it is shown the contribution of every effect to the global IMD. The system was tested with a DSB (Double Side Band) signal. As a result, with an envelope bandwidth of 2kHz and a delay between branches smaller than 5 μs, more than 60 dB of intermodulation product rejection was achieved. It has also been developed an algorithm which determines the delay between branches with an error smaller than 0.035o when the signal is a non-modulated tone

Efficient, High power Precision RF and mmWave Digital Transmitter Architectures

Digital transmitters offer several advantages over conventional analog transmitters such as reconfigurability, elimination of scaling-unfriendly, power hungry and bulky analog blocks and portability across technology. The rapid advancement of technology in CMOS processes also enables integration of complex digital signal processing circuitry on the same die as the digital transmitter to compensate for their non-idealities. The use of this digital assistance can, for instance, enable the use of highly efficient but nonlinear switching-class power amplifiers by compensating for their severe nonlinearity through digital predistortion. While this shift to digitally intensive transmitter architectures is propelled by the benefits stated above, several pressing challenges arise that vary in their nature depending on the frequency of operation - from RF to mmWave. Millimeter wave CMOS power amplifiers have traditionally been limited in output power due to the low breakdown voltage of scaled CMOS technologies and poor quality of on-chip passives. Moreover, high data-rates and efficient spectrum utilization demand highly linear power amplifiers with high efficiency under back-off. However, linearity and high efficiency are traditionally at odds with each other in conventional power amplifier design. In this dissertation, digital assistance is used to relax this trade-off and enable the use of state-of-the-art switching class power amplifiers. A novel digital transmitter architecture which simultaneously employs aggressive device-stacking and large-scale power combining for watt-class output power, dynamic load modulation for linearization, and improved efficiency under back-off by supply-switching and load modulation is presented. At RF frequencies, while the problem of watt-class power amplification has been long solved, more pressing challenges arise from the crowded spectrum in this regime. A major drawback of digital transmitters is the absence of a reconstruction filter after digital-to-analog conversion which causes the baseband quantization noise to get upconverted to RF and amplified at the output of the transmitter. In high power transmitters, this upconverted noise can be so strong as to prevent their use in FDD systems due to receiver desensitization or impose stringent coexistence challenges. In this dissertation, new quantization noise suppression techniques are presented which, for the first time, contribute toward making watt-class fully-integrated digital RF transmitters a viable alternative for FDD and coexistence scenarios. Specifically, the techniques involve embedding a mixed-domain multi-tap FIR filter within highly-efficient watt-class switching power amplifiers to suppress quantization noise, enhancing the bandwidth of noise suppression, enabling tunable location of suppression and overcoming the limitations of purely digital-domain filtering techniques for quantization noise

Guest editorial for the special issue on software-defined radio transceivers and circuits for 5G wireless communications

Yichuang Sun, Baoyong Chi, and Heng Zhang, Guest Editorial for the Special Issue on Software-Defined Radio Transceivers and Circuits for 5G Wireless Communications, published in IEEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 63 (1): 1-3, January 2016, doi: https://doi.org/10.1109/TCSII.2015.2506979.Peer reviewedFinal Accepted Versio

Bandpass delta sigma optimization using parameter identification

International audienceIn this paper, a new method to optimize the noise shape of a bandpass delta sigma (BPDS) modulator for a digital transmitter is presented. The optimal coefficients of BPDS structure are obtained by minimization of a quadratic criterion based on prediction error. To demonstrate the effectiveness of this approach, simulated results for a 6th order BPDS structure are presented

Optimization of Band Pass Delta Sigma modulators using parameters identification

International audienceIn this paper, a method to study and characterize a single-loop, cascaded and 1-bit band-pass delta sigma (BPΔΣ) modulator for digital transmitter is presented. This technique is based on a combination of digital filter simulation and nonlinear optimization of signal-to-quantization noise. The optimal coefficients of BPΔΣ structure are achieved by minimization of a quadratic criterion based on prediction error between desired digital filter and noise transfer model. To demonstrate the effectiveness of this approach, simulated results for a 6th order cascaded structure for WCDMA band-1 standard are presented

Coherent versus noncoherent signaling for satellite-aided mobile communications

The use of coherent versus noncoherent communications is an unresolved issue for the mobile satellite community. Should one select the more robust but less efficient noncoherent strategy for communications over satellite-aided mobile channels, or does the introduction of a space platform in the mobile link improve signal stability (both amplitude and phase) such that conventional coherent schemes become attractive? This publication tries to answer some of the questions by discussing the results from experiments using a coherent QPSK receiver. The issues discussed include items such as the measured performance in Rician fading, the link error floor in a fading environment, etc. The results are compared and contrasted with that of a noncoherent limiter/discriminator FM receiver