Device modeling of superconductor transition edge sensors based on the two-fluid theory

In order to support the design and study of sophisticated large scale transition edge sensor (TES) circuits, we use basic SPICE elements to develop device models for TESs based on the superfluid-normal fluid theory. In contrast to previous studies, our device model is not limited to small signal simulation, and it relies only on device parameters that have clear physical meaning and can be easily measured. We integrate the device models in design kits based on powerful EDA tools such as CADENCE and OrCAD, and use them for versatile simulations of TES circuits. Comparing our simulation results with published experimental data, we find good agreement which suggests that device models based on the two-fluid theory can be used to predict the behavior of TES circuits reliably and hence they are valuable for assisting the design of sophisticated TES circuits.Comment: 10pages,11figures. Accepted to IEEE Trans. Appl. Supercon

Towards device-size atomistic models of amorphous silicon

The atomic structure of amorphous materials is believed to be well described by the continuous random network model. We present an algorithm for the generation of large, high-quality continuous random networks. The algorithm is a variation of the "sillium" approach introduced by Wooten, Winer, and Weaire. By employing local relaxation techniques, local atomic rearrangements can be tried that scale almost independently of system size. This scaling property of the algorithm paves the way for the generation of realistic device-size atomic networks.Comment: 7 pages, 3 figure

Neural-Based Nonlinear Device Models for Intermodulation Analysis

A new procedure to learn a nonlinear model together with its derivative parameters using a composite neural network is presented.So far neural networks have never been used to extract large-signal device model accounting for distortion parameters.Applying this method to FET devices leads to nonlinear models for current- voltage functions which allow improved prediction of weak and mildly device nonlinearities in the whole bias region. The resulting models have demonstrated to be suitable for both small-signal and large-signal analyses,including intermodulation distortion prediction

Parametric Macromodels of Digital I/O Ports

This paper addresses the development of macromodels for input and output ports of a digital device. The proposed macromodels consist of parametric representations that can be obtained from port transient waveforms at the device ports via a well established procedure. The models are implementable as SPICE subcircuits and their accuracy and efficiency are verified by applying the approach to the characterization of transistor-level models of commercial devices

Behavioral Modelling of Digital Devices Via Composite Local-Linear State-Space Relations

This paper addresses the generation of accurate and efficient behavioral models of digital ICs. The proposed approach is based on the approximation of the device port characteristics by means of composite local linear state-space relations whose parameters can effectively be estimated from device port transient responses via well-established system identification techniques. The proposedmodels have been proven to overcome some inherent limitations of the state-of-the-art models used so far, and they can effectively be implemented in any commercial tool as Simulation Program with Integrated Circuit Emphasis (SPICE) subcircuits or VHDL-AMS hardware descriptions. A systematic study of the performances of the proposed state-space models is carried out on a synthetic test device. The effectiveness of the proposed approach has been demonstrated on a real application problem involving commercial devices and a data link of a mobile phon

Behavioral Models of I/O Ports from Measured Transient Waveforms

This paper addresses the development of accurate and efficient behavioral models of digital integrated circuit ports from measured transient responses. The proposed approach is based on the estimation of parametric models from port voltage and current waveforms. The modeling process is described and applied to the modeling of output ports. Its feasibility is demonstrated by the identification of a real device from actual measurements, and by the comparison of the predicted device response with the measured one

Nonlinear time-domain macromodeling of OTA circuits

The authors present an accurate nonlinear macromodel of the operational transconductance amplifier (OTA) which is suitable for the transient simulation of OTA-based CMOS analog integrated circuits. As compared to device-level OTA models, the proposed macromodel is advantageous in terms of CPU time. Also, in circuits with many OTAs, it does not have the problems of convergence that the device-level MODEL has. All the macromodel parameters can be calculated from measurements made at the OTA terminals. Experimental results from a 3-μm CMOS OTA prototype as well as simulation results from device-level models are included and compared to simulation results from the macromodel