Per-Core DVFS with Switched-Capacitor Converters for Energy Efficiency in Manycore Processors

Integrating multiple power converters on-chip improves energy efficiency of manycore architectures. Switched-capacitor (SC) dc-dc converters are compatible with conventional CMOS processes, but traditional implementations suffer from limited conversion efficiency. We propose a dynamic voltage and frequency scaling scheme with SC converters that achieves high converter efficiency by allowing the output voltage to ripple and having the processor core frequency track the ripple. Minimum core energy is achieved by hopping between different converter modes and tuning body-bias voltages. A multicore processor model based on a 28-nm technology shows conversion efficiencies of 90% along with over 25% improvement in the overall chip energy efficiency

Revisiting LFSMs

Linear Finite State Machines (LFSMs) are particular primitives widely used in information theory, coding theory and cryptography. Among those linear automata, a particular case of study is Linear Feedback Shift Registers (LFSRs) used in many cryptographic applications such as design of stream ciphers or pseudo-random generation. LFSRs could be seen as particular LFSMs without inputs. In this paper, we first recall the description of LFSMs using traditional matrices representation. Then, we introduce a new matrices representation with polynomial fractional coefficients. This new representation leads to sparse representations and implementations. As direct applications, we focus our work on the Windmill LFSRs case, used for example in the E0 stream cipher and on other general applications that use this new representation. In a second part, a new design criterion called diffusion delay for LFSRs is introduced and well compared with existing related notions. This criterion represents the diffusion capacity of an LFSR. Thus, using the matrices representation, we present a new algorithm to randomly pick LFSRs with good properties (including the new one) and sparse descriptions dedicated to hardware and software designs. We present some examples of LFSRs generated using our algorithm to show the relevance of our approach.Comment: Submitted to IEEE-I

05431 Abstracts Collection -- Deduction and Applications

From 23.10.05 to 28.10.05, the Dagstuhl Seminar 05431 ``Deduction and Applications\u27\u27 was held in the International Conference and Research Center (IBFI), Schloss Dagstuhl. During the seminar, several participants presented their current research, and ongoing work and open problems were discussed. Abstracts of the presentations given during the seminar as well as abstracts of seminar results and ideas are put together in this paper. The first section describes the seminar topics and goals in general. Links to extended abstracts or full papers are provided, if available

Optimization of Radio and Computational Resources for Energy Efficiency in Latency-Constrained Application Offloading

Providing femto-access points (FAPs) with computational capabilities will allow (either total or partial) offloading of highly demanding applications from smart-phones to the so called femto-cloud. Such offloading promises to be beneficial in terms of battery saving at the mobile terminal (MT) and/or latency reduction in the execution of applications, whenever the energy and/or time required for the communication process are compensated by the energy and/or time savings that result from the remote computation at the FAPs. For this problem, we provide in this paper a framework for the joint optimization of the radio and computational resource usage exploiting the tradeoff between energy consumption and latency, and assuming that multiple antennas are available at the MT and the serving FAP. As a result of the optimization, the optimal communication strategy (e.g., transmission power, rate, precoder) is obtained, as well as the optimal distribution of the computational load between the handset and the serving FAP. The paper also establishes the conditions under which total or no offloading are optimal, determines which is the minimum affordable latency in the execution of the application, and analyzes as a particular case the minimization of the total consumed energy without latency constraints.Comment: Accepted to be published at IEEE Transactions on Vehicular Technology (acceptance: November 2014