Meeting the design challenges of nano-CMOS electronics: an introduction to an upcoming EPSRC pilot project

The years of ‘happy scaling’ are over and the fundamental challenges that the semiconductor industry faces, at both technology and device level, will impinge deeply upon the design of future integrated circuits and systems. This paper provides an introduction to these challenges and gives an overview of the Grid infrastructure that will be developed as part of a recently funded EPSRC pilot project to address them, and we hope, which will revolutionise the electronics design industry

Asynchronous Circuit Stacking for Simplified Power Management

As digital integrated circuits (ICs) continue to increase in complexity, new challenges arise for designers. Complex ICs are often designed by incorporating multiple power domains therefore requiring multiple voltage converters to produce the corresponding supply voltages. These converters not only take substantial on-chip layout area and/or off-chip space, but also aggregate the power loss during the voltage conversions that must occur fast enough to maintain the necessary power supplies. This dissertation work presents an asynchronous Multi-Threshold NULL Convention Logic (MTNCL) “stacked” circuit architecture that alleviates this problem by reducing the number of voltage converters needed to supply the voltage the ICs operate at. By stacking multiple MTNCL circuits between power and ground, supplying a multiple of VDD to the entire stack and incorporating simple control mechanisms, the dynamic range fluctuation problem can be mitigated. A 130nm Bulk CMOS process and a 32nm Silicon-on-Insulator (SOI) CMOS process are used to evaluate the theoretical effect of stacking different circuitry while running different workloads. Post parasitic physical implementations are then carried out in the 32nm SOI process for demonstrating the feasibility and analyzing the advantages of the proposed MTNCL stacking architecture

A review of advances in pixel detectors for experiments with high rate and radiation

The Large Hadron Collider (LHC) experiments ATLAS and CMS have established hybrid pixel detectors as the instrument of choice for particle tracking and vertexing in high rate and radiation environments, as they operate close to the LHC interaction points. With the High Luminosity-LHC upgrade now in sight, for which the tracking detectors will be completely replaced, new generations of pixel detectors are being devised. They have to address enormous challenges in terms of data throughput and radiation levels, ionizing and non-ionizing, that harm the sensing and readout parts of pixel detectors alike. Advances in microelectronics and microprocessing technologies now enable large scale detector designs with unprecedented performance in measurement precision (space and time), radiation hard sensors and readout chips, hybridization techniques, lightweight supports, and fully monolithic approaches to meet these challenges. This paper reviews the world-wide effort on these developments.Comment: 84 pages with 46 figures. Review article.For submission to Rep. Prog. Phy

Towards Tamper-Evident Storage on Patterned Media

We propose a tamper-evident storage system based on probe storage with a patterned magnetic medium. This medium supports normal read/write operations by out-of-plane magnetisation of individual magnetic dots. We report on measurements showing that in principle the medium also supports a separate class of write-once operation that destroys the out-of-plane magnetisation property of the dots irreversibly by precise local heating. We discuss the main issues of designing a tamper-evident storage device and file system using the properties of the medium

Quadrature LC VCO with passive coupling and phase combining network

A circuit and method for generating a signal is disclosed. The circuit includes a set of wide tuning LC tanks, a set of core transistors cross coupled to the set of wide tuning LC tanks, and a combining network coupled to the set of wide tuning LC tanks and the set of core transistors. The combining network further includes a set of inputs connected to the set of wide tuning LC tanks and the set of core transistors, a set of coupling transistors connected to the set of inputs, a set of source inductors connected to the set of coupling transistors, a coupling capacitor connected to the set of source inductors, a load resistor connected to the coupling capacitor. The combining network combines the set of inputs and the signal is delivered to the load resistor as a fourth order harmonic.Board of Regents, University of Texas Syste

Preparing sparse solvers for exascale computing.

Sparse solvers provide essential functionality for a wide variety of scientific applications. Highly parallel sparse solvers are essential for continuing advances in high-fidelity, multi-physics and multi-scale simulations, especially as we target exascale platforms. This paper describes the challenges, strategies and progress of the US Department of Energy Exascale Computing project towards providing sparse solvers for exascale computing platforms. We address the demands of systems with thousands of high-performance node devices where exposing concurrency, hiding latency and creating alternative algorithms become essential. The efforts described here are works in progress, highlighting current success and upcoming challenges. This article is part of a discussion meeting issue 'Numerical algorithms for high-performance computational science'

Optimal Control of Transient Flow in Natural Gas Networks

We outline a new control system model for the distributed dynamics of compressible gas flow through large-scale pipeline networks with time-varying injections, withdrawals, and control actions of compressors and regulators. The gas dynamics PDE equations over the pipelines, together with boundary conditions at junctions, are reduced using lumped elements to a sparse nonlinear ODE system expressed in vector-matrix form using graph theoretic notation. This system, which we call the reduced network flow (RNF) model, is a consistent discretization of the PDE equations for gas flow. The RNF forms the dynamic constraints for optimal control problems for pipeline systems with known time-varying withdrawals and injections and gas pressure limits throughout the network. The objectives include economic transient compression (ETC) and minimum load shedding (MLS), which involve minimizing compression costs or, if that is infeasible, minimizing the unfulfilled deliveries, respectively. These continuous functional optimization problems are approximated using the Legendre-Gauss-Lobatto (LGL) pseudospectral collocation scheme to yield a family of nonlinear programs, whose solutions approach the optima with finer discretization. Simulation and optimization of time-varying scenarios on an example natural gas transmission network demonstrate the gains in security and efficiency over methods that assume steady-state behavior

A Network Coding Approach to Loss Tomography

Network tomography aims at inferring internal network characteristics based on measurements at the edge of the network. In loss tomography, in particular, the characteristic of interest is the loss rate of individual links and multicast and/or unicast end-to-end probes are typically used. Independently, recent advances in network coding have shown that there are advantages from allowing intermediate nodes to process and combine, in addition to just forward, packets. In this paper, we study the problem of loss tomography in networks with network coding capabilities. We design a framework for estimating link loss rates, which leverages network coding capabilities, and we show that it improves several aspects of tomography including the identifiability of links, the trade-off between estimation accuracy and bandwidth efficiency, and the complexity of probe path selection. We discuss the cases of inferring link loss rates in a tree topology and in a general topology. In the latter case, the benefits of our approach are even more pronounced compared to standard techniques, but we also face novel challenges, such as dealing with cycles and multiple paths between sources and receivers. Overall, this work makes the connection between active network tomography and network coding