Optimization of DSSS Receivers Using Hardware-in-the-Loop Simulations

Over the years, there has been significant interest in defining a hardware abstraction layer to facilitate code reuse in software defined radio (SDR) applications. Designers are looking for a way to enable application software to specify a waveform, configure the platform, and control digital signal processing (DSP) functions in a hardware platform in a way that insulates it from the details of realization. This thesis presents a tool-based methodolgy for developing and optimizing a Direct Sequence Spread Spectrum (DSSS) transceiver deployed in custom hardware like Field Programmble Gate Arrays (FPGAs). The system model consists of a tranmitter which employs a quadrature phase shift keying (QPSK) modulation scheme, an additive white Gaussian noise (AWGN) channel, and a receiver whose main parts consist of an analog-to-digital converter (ADC), digital down converter (DDC), image rejection low-pass filter (LPF), carrier phase locked loop (PLL), tracking locked loop, down-sampler, spread spectrum correlators, and rectangular-to-polar converter. The design methodology is based on a new programming model for FPGAs developed in the industry by Xilinx Inc. The Xilinx System Generator for DSP software tool provides design portability and streamlines system development by enabling engineers to create and validate a system model in Xilinx FPGAs. By providing hierarchical modeling and automatic HDL code generation for programmable devices, designs can be easily verified through hardware-in-the-loop (HIL) simulations. HIL provides a significant increase in simulation speed which allows optimization of the receiver design with respect to the datapath size for different functional parts of the receiver. The parameterized datapath points used in the simulation are ADC resolution, DDC datapath size, LPF datapath size, correlator height, correlator datapath size, and rectangular-to-polar datapath size. These parameters are changed in the software enviornment and tested for bit error rate (BER) performance through real-time hardware simualtions. The final result presents a system design with minimum harware area occupancy relative to an acceptable BER degradation

Design of software radio

Software Define Radio (SDR) has become a prevalent technology in wireless systems. In SDR some or all of the signal specific handling is implemented in software functions, while other functions like decimation, interpolation, digital up-conversion and digital down conversion are done on reprogrammable Digital Signal Processor or Field Programmable Gate Arrays.Twelve laboratory exercises have been designed to lead the student through the process of using the Universal Software Radio peripheral (USRP) hardware and GNU Radio open source software

Design of software radio

Software Define Radio (SDR) has become a prevalent technology in wireless systems. In SDR some or all of the signal specific handling is implemented in software functions, while other functions like decimation, interpolation, digital up-conversion and digital down conversion are done on reprogrammable Digital Signal Processor or Field Programmable Gate Arrays.Twelve laboratory exercises have been designed to lead the student through the process of using the Universal Software Radio peripheral (USRP) hardware and GNU Radio open source software

Software Defined Radio Implementation Of Ds-Cdma In Inter-Satellite Communications For Small Satellites

The increased usage of CubeSats recently has changed the communication philosophy from long-range point-to-point propagations to a multi-hop network of small orbiting nodes. Separating system tasks into many dispersed satellites can increase system survivability, versatility, configurability, adaptability, and autonomy. Inter-satellite links (ISL) enable the satellites to exchange information and share resources while reducing the traffic load to the ground. Establishment and stability of the ISL are impacted by factors such as the satellite orbit and attitude, antenna configuration, constellation topology, mobility, and link range. Software Defined Radio (SDR) is beginning to be heavily used in small satellite communications for applications such as base stations. A software-defined radio is a software program that does the functionality of a hardware system. The digital signal processing blocks are incorporated into the software giving it more flexibility and modulation. With this, the idea of a remote upgrade from the ground as well as the potential to accommodate new applications and future services without hardware changes is very promising. Realizing this, my idea is to create an inter-satellite link using software defined radio. The advantages of this are higher data rates, modification of operating frequencies, possibility of reaching higher frequency bands for higher throughputs, flexible modulation, demodulation and encoding schemes, and ground modifications. However, there are several challenges in utilizing the software-defined radio to create an inter-satellite link communication for small satellites. In this paper, we designed and implemented a multi-user inter-satellite communication network using SDRs, where Code Division Multiple Access (CDMA) technique is utilized to manage the multiple accesses to shared communication channel among the satellites. This model can be easily reconfigured to support any encoding/decoding, modulation, and other signal processing schemes

Software Defined Radio Implementation Of Ds-Cdma In Inter-Satellite Communications For Small Satellites

The increased usage of CubeSats recently has changed the communication philosophy from long-range point-to-point propagations to a multi-hop network of small orbiting nodes. Separating system tasks into many dispersed satellites can increase system survivability, versatility, configurability, adaptability, and autonomy. Inter-satellite links (ISL) enable the satellites to exchange information and share resources while reducing the traffic load to the ground. Establishment and stability of the ISL are impacted by factors such as the satellite orbit and attitude, antenna configuration, constellation topology, mobility, and link range. Software Defined Radio (SDR) is beginning to be heavily used in small satellite communications for applications such as base stations. A software-defined radio is a software program that does the functionality of a hardware system. The digital signal processing blocks are incorporated into the software giving it more flexibility and modulation. With this, the idea of a remote upgrade from the ground as well as the potential to accommodate new applications and future services without hardware changes is very promising. Realizing this, my idea is to create an inter-satellite link using software defined radio. The advantages of this are higher data rates, modification of operating frequencies, possibility of reaching higher frequency bands for higher throughputs, flexible modulation, demodulation and encoding schemes, and ground modifications. However, there are several challenges in utilizing the software-defined radio to create an inter-satellite link communication for small satellites. In this paper, we designed and implemented a multi-user inter-satellite communication network using SDRs, where Code Division Multiple Access (CDMA) technique is utilized to manage the multiple accesses to shared communication channel among the satellites. This model can be easily reconfigured to support any encoding/decoding, modulation, and other signal processing schemes

Near Real-Time Zigbee Device Discrimination Using CB-DNA Features

Currently, Low-Rate Wireless Personal Area Networks (LR-WPAN) based on the Institute of Electrical and Electronics Engineers (IEEE) 802.15.4 standard are at risk due to open-source tools which allow bad actors to exploit unauthorized network access through various cyberattacks by falsifying bit-level credentials. This research investigates implementing a Radio Frequency (RF) air monitor to perform Near RealTime (NRT) discrimination of Zigbee devices using the IEEE 802.15.4 standard. The air monitor employed a Multiple Discriminant Analysis/Euclidean Distance classifier to discriminate Zigbee devices based upon Constellation-Based Distinct Native Attribute (CB-DNA) fingerprints. Through the use of CB-DNA fingerprints, Physical Layer (PHY) characteristics unique to each Zigbee device strengthen the native bit-level authentication process for LR-WPAN networks. Overall, the developed RF air monitor achieved an Average Cross-Class Percent Correct Classification of %Ctst = 99:24% during the testing of Ncls = 5 like-model BladeRF Software Defined Radios transmitting Zigbee protocol bursts. Additionally, to evaluate the NRT capability of the air monitor, a statistical analysis of Ntiming = 1000 Zigbee bursts determined the worst-case average runtime from burst detection to classification. The analysis concluded that the runtime was truntime fi 269 mSec. Ultimately, this research found that PHY characteristics provide an additional method of authentication NRT to enhance the inherent network security for Zigbee applications from cyberattacks

Design and implementation of low complexity wake-up receiver for underwater acoustic sensor networks

This thesis designs a low-complexity dual Pseudorandom Noise (PN) scheme for identity (ID) detection and coarse frame synchronization. The two PN sequences for a node are identical and are separated by a specified length of gap which serves as the ID of different sensor nodes. The dual PN sequences are short in length but are capable of combating severe underwater acoustic (UWA) multipath fading channels that exhibit time varying impulse responses up to 100 taps. The receiver ID detection is implemented on a microcontroller MSP430F5529 by calculating the correlation between the two segments of the PN sequence with the specified separation gap. When the gap length is matched, the correlator outputs a peak which triggers the wake-up enable. The time index of the correlator peak is used as the coarse synchronization of the data frame. The correlator is implemented by an iterative algorithm that uses only one multiplication and two additions for each sample input regardless of the length of the PN sequence, thus achieving low computational complexity. The real-time processing requirement is also met via direct memory access (DMA) and two circular buffers to accelerate data transfer between the peripherals and the memory. The proposed dual PN detection scheme has been successfully tested by simulated fading channels and real-world measured channels. The results show that, in long multipath channels with more than 60 taps, the proposed scheme achieves high detection rate and low false alarm rate using maximal-length sequences as short as 31 bits to 127 bits, therefore it is suitable as a low-power wake-up receiver. The future research will integrate the wake-up receiver with Digital Signal Processors (DSP) for payload detection. --Abstract, page iv

Design and Analysis of OFDM System for Powerline Based Communication

Research on digital communication systems has been greatly developed in the past few years and offers a high quality of transmission in both wired and wireless communication environments. Coupled with advances in new modulation techniques, Orthogonal Frequency Division Multiplexing (OFDM) is a well-known digital multicarrier communication technique and one of the best methods of digital data transmission over a limited bandwidth. The main aim of this research is to design an OFDM modem for powerline-based communication in order to propose and examine a novel approach in comparing the different modulation order, different modulation type, application of Forward Error Correction (FEC) scheme and also application of different noise types and applying them to the two modelled channels, Additive White Gaussian Noise (AWGN) and Powerline modelled channel. This is an attempt to understand and recognise the most suitable technique for the transmission of message or image within a communication system. In doing so, MATLAB and embedded Digital Signal Processing (DSP) systems are used to simulate the operation of virtual transmitter and receiver. The simulation results presented in this project suggest that lower order modulation formats (Binary Phase Shift Keying (BPSK) and 4-Quadrature Amplitude Modulation (QAM)), are the most preferred modulation techniques (in both type and order) for their considerable performance. The results also indicated that, Convolutional Channel Encoding (CCE)-Soft and Block Channel Encoding (BCE)-Soft are by far the best encoding techniques (in FEC type) for their best performance in error detection and correction. Indeed, applying these techniques to the two modelled channels has proven very successful and will be accounted as a novel approach for the transmission of message or image within a powerline based communication system