15 research outputs found

    Tight Bounds on the Synthesis of 3-bit Reversible Circuits: NFT Library

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    The reversible circuit synthesis problem can be reduced to permutation group. This allows Schreier-Sims Algorithm for the strong generating set-finding problem to be used to find tight bounds on the synthesis of 3-bit reversible circuits using the NFT library. The tight bounds include the maximum and minimum length of 3-bit reversible circuits, the maximum and minimum cost of 3-bit reversible circuits. The analysis shows better results than that found in the literature for the lower bound of the cost. The analysis also shows that there are 1960 universal reversible sub-libraries from the main NFT library.Comment: 18 pages. arXiv admin note: text overlap with arXiv:1101.438

    A Library-Based Synthesis Methodology for Reversible Logic

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    In this paper, a library-based synthesis methodology for reversible circuits is proposed where a reversible specification is considered as a permutation comprising a set of cycles. To this end, a pre-synthesis optimization step is introduced to construct a reversible specification from an irreversible function. In addition, a cycle-based representation model is presented to be used as an intermediate format in the proposed synthesis methodology. The selected intermediate format serves as a focal point for all potential representation models. In order to synthesize a given function, a library containing seven building blocks is used where each building block is a cycle of length less than 6. To synthesize large cycles, we also propose a decomposition algorithm which produces all possible minimal and inequivalent factorizations for a given cycle of length greater than 5. All decompositions contain the maximum number of disjoint cycles. The generated decompositions are used in conjunction with a novel cycle assignment algorithm which is proposed based on the graph matching problem to select the best possible cycle pairs. Then, each pair is synthesized by using the available components of the library. The decomposition algorithm together with the cycle assignment method are considered as a binding method which selects a building block from the library for each cycle. Finally, a post-synthesis optimization step is introduced to optimize the synthesis results in terms of different costs.Comment: 24 pages, 8 figures, Microelectronics Journal, Elsevie

    Improving Quantum Circuit Synthesis with Machine Learning

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    In the Noisy Intermediate Scale Quantum (NISQ) era, finding implementations of quantum algorithms that minimize the number of expensive and error prone multi-qubit gates is vital to ensure computations produce meaningful outputs. Unitary synthesis, the process of finding a quantum circuit that implements some target unitary matrix, is able to solve this problem optimally in many cases. However, current bottom-up unitary synthesis algorithms are limited by their exponentially growing run times. We show how applying machine learning to unitary datasets permits drastic speedups for synthesis algorithms. This paper presents QSeed, a seeded synthesis algorithm that employs a learned model to quickly propose resource efficient circuit implementations of unitaries. QSeed maintains low gate counts and offers a speedup of 3.7×3.7\times in synthesis time over the state of the art for a 64 qubit modular exponentiation circuit, a core component in Shor's factoring algorithm. QSeed's performance improvements also generalize to families of circuits not seen during the training process.Comment: 11 pages, 10 figure

    Exact and practical pattern matching for quantum circuit optimization

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    Quantum computations are typically compiled into a circuit of basic quantum gates. Just like for classical circuits, a quantum compiler should optimize the quantum circuit, e.g. by minimizing the number of required gates. Optimizing quantum circuits is not only relevant for improving the runtime of quantum algorithms in the long term, but is also particularly important for near-term quantum devices that can only implement a small number of quantum gates before noise renders the computation useless. An important building block for many quantum circuit optimization techniques is pattern matching, where given a large and a small quantum circuit, we are interested in finding all maximal matches of the small circuit, called pattern, in the large circuit, considering pairwise commutation of quantum gates. In this work, we present a classical algorithm for pattern matching that provably finds all maximal matches in time polynomial in the circuit size (for a fixed pattern size). Our algorithm works for both quantum and reversible classical circuits. We demonstrate numerically that our algorithm, implemented in the open-source library Qiskit, scales considerably better than suggested by the theoretical worst-case complexity and is practical to use for circuit sizes typical for near-term quantum devices. Using our pattern matching algorithm as the basis for known circuit optimization techniques such as template matching and peephole optimization, we demonstrate a significant (~30%) reduction in gate count for random quantum circuits, and are able to further improve practically relevant quantum circuits that were already optimized with state-of-the-art techniques.Comment: Raban Iten and Romain Moyard contributed equally to this work. Major updates: Added numerical analysis of the pattern matching algorithm; fixed two special cases that were missed by our algorithm and updated the worst-case complexity analysis. 10 pages summary + 23 pages main text + 7 pages appendi

    Synthesis and Optimization of Reversible Circuits - A Survey

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    Reversible logic circuits have been historically motivated by theoretical research in low-power electronics as well as practical improvement of bit-manipulation transforms in cryptography and computer graphics. Recently, reversible circuits have attracted interest as components of quantum algorithms, as well as in photonic and nano-computing technologies where some switching devices offer no signal gain. Research in generating reversible logic distinguishes between circuit synthesis, post-synthesis optimization, and technology mapping. In this survey, we review algorithmic paradigms --- search-based, cycle-based, transformation-based, and BDD-based --- as well as specific algorithms for reversible synthesis, both exact and heuristic. We conclude the survey by outlining key open challenges in synthesis of reversible and quantum logic, as well as most common misconceptions.Comment: 34 pages, 15 figures, 2 table
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